Si5381E-E-GM datasheet(5/51 Pages) SILABS

Part #	Si5381E-E-GM

Description	Multi-DSPLL Wireless Jitter Attenuating Clocks

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Manufacturer	SILABS [Silicon Laboratories]

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3.5.14 Output Divider (R) Synchronization ....................21

3.6 Power Management ............................21

3.6.1 Power Down Pin (PDNb) ........................21

3.7 In-Circuit Programming ...........................21

3.8 Serial Interface

.............................21

3.9 Custom Factory Preprogrammed Devices ....................22

3.10 How to Enable Features and/or Configuration Settings Not Available in ClockBuilder Pro for Factory

Pre-programmed Devices ..........................23

4. Register Map

.............................. 24

5. Electrical Specifications

.......................... 25

6. Typical Application Diagram

........................38

7. Detailed Block Diagram

.......................... 39

8. Typical Operating Characteristics (Phase Noise and Jitter)

............. 40

9. Pin Descriptions

............................. 41

10. Packages

............................... 45

10.1 64-LGA Package ............................45

10.2 64-QFN Package ............................46

11. PCB Land Pattern

............................ 47

12. Top Marking

.............................. 48

13. Device Errata .............................. 49

14. Revision History.............................

50

14.1 Revision 0.9 ..............................50

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Preliminary Rev. 0.9 | 5

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Similar Description - Si5381E-E-GM

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Si5381E-E-GM Datasheet(PDF) 5 Page - Silicon Laboratories

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