2.2.5 SPI Daisy Chain Organization

The Si838x provides the capability to easily interconnect multiple Si838x devices on a common SPI interface administered by a single

SPI master requiring no additional control signals. To accomplish this, the Si838x includes the additional SPI device output pin

SDI_THRU

pin of the next Si838x device in the daisy-chain. All bits composing a SPI communication packet are passed directly through by the

following Si838x device, etc. As this bit field is passed through the Si838x, it is decremented by one. This four bit field is placed in the

control word by the SPI master in reverse order, allowing the carry of the decrement to ripple into the next bit in the CID field as the bits

the SPI master and the Si838x activated in this manner proceed as previously discussed for the case of the single Si838x slave. The

organization of an Si838x system daisy-chained in this manner is depicted in the figure below.

Si838x[0]

Si838x[1]

Si838x[2]

Si838x[3]

Si838x[4]

Si838x[15]

SPI_master

Figure 2.5. SPI Daisy Chain Organization

From the preceding figure, and referring to Figure 2.2 SPI Communication Packet Structure, Write Operation and Control Byte Structure

on page 3, in order to read from Si838x[1], the control word would be:

Control[7:0] = 0100_1000.

Similarly, in order to write to Si838x[12], the control word would be:

Control[7:0] = 0000_0011.

Finally, if it were desired to update an internal SPI register of all daisy-chained Si838x devices, the control word would be:

Control[7:0] = 1000_0000.

ros.

As a result, the maximum possible SCLK frequency will be reduced based on the number of Si838x devices connected in a daisy-chain

organization.

Si838x Data Sheet

Functional Description

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