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DAC5574 Datasheet(PDF) 16 Page - Texas Instruments

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Part No. DAC5574
Description  QUAD, 8-BIT, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL TO ANALOG CONVERTER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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DAC5574 Datasheet(HTML) 16 Page - Texas Instruments

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DAC5574 Registers
DAC5574 as a Slave Receiver - Standard and Fast Mode
SLAVE ADDRESS R/W
A Ctrl-Byte
A MS-Byte A
LS-Byte
A/A
P
0 (write)
Data Transferred
(n* Words + Acknowledge)
Word = 16 Bit
From Master to DAC5574
From DAC5574 to Master
A = Acknowledge (SDA LOW)
A = Not Acknowledge (SDA HIGH)
S = START Condition
Sr = Repeated START Condition
P = STOP Condition
DAC5574 I2C-SLAVE ADDRESS:
1
0
0
1
1
A1
A0
R/W
MSB
LSB
Factory Preset
A0 = I2C Address Pin
A1 = I2C Address Pin
S
0 = Write to DAC5574
1 = Read from DAC5574
DAC5574
SLAS407 – DECEMBER 2003
Table 3. DAC5574 Architecture Register Descriptions
REGISTER
DESCRIPTION
CTRL[7:0]
Stores 8-bit wide control byte sent by the master
MSB[7:0]
Stores the 8 most significant bits of unsigned binary data sent by the master. Can also store 2-bit power-down data.
TRA[9:0], TRB[9:0],
10-bit temporary storage registers assigned to each channel. Two MSBs store power-down information, 8 LSBs
TRC[9:0], TRD[9:0]
store data.
DRA[9:0], DRB[9:0],
10-bit DAC registers for each channel. Two MSBs store power-down information, 8 LSBs store DAC data. An
DRC[9:0], DRD[9:0]
update of this register means a DAC update with data or power down.
Figure 33 shows the standard and fast mode master transmitter addressing a DAC5574 Slave Receiver with a
7-bit address.
Figure 33. Standard and Fast Mode: Slave Receiver
16


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