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CY28346OCT Datasheet(PDF) 15 Page - Silicon Laboratories |
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CY28346OCT Datasheet(HTML) 15 Page - Silicon Laboratories |
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15 / 19 page 
CY28346 ......................Document #: 38-07331 Rev. *C Page 15 of 19 TCCJ CPU Cycle to Cycle Jitter 150 150 150 150 ps 15, 16, 19 TR/TF CPUT and CPUC Rise and Fall Times 175 700 175 700 175 700 175 700 ps 15, 17, 20 Rise/Fall Matching 20% 20% 20% 20% 17, 18, 19 DeltaTR Rise Time Variation 125 125 125 125 ps 17, 19 DeltaTF Fall Time Variation 125 125 125 125 ps 17, 19 VCROSS Crossing Point Voltage at 0.7V Swing 280 430 280 430 280 430 280 430 mV 15, 19 CPU at 1.0V Timing TDC CPUT and CPUC Duty Cycle 45 55 45 55 45 55 45 55 % 15, 16 TPERIOD CPUT and CPUC Period 14.85 15.3 9.85 10.2 7.35 7.65 4.85 5.1 nS 15, 16 TSKEW Any CPU to Any CPU Clock Skew 100 100 100 100 pS 12, 15, 16 TCCJ CPU Cycle to Cycle Jitter 150 150 150 150 pS 12, 16 Differential TR/TF CPUT and CPUC Rise and Fall Times 175 467 175 467 175 467 175 467 ps 15, 20 SE– DeltaSlew Absolute Single- ended Rise/Fall Waveform Symmetry 325 325 325 325 ps 21, 22 VCROSS Cross Point at 1.0V swing 510 760 510 760 510 760 510 760 mV 22 3V66 TDC 3V66 Duty Cycle 45 55 45 55 45 55 45 55 % 12, 13 TPERIOD 3V66 Period 15.0 15.3 15.0 15.3 15.0 15.3 15.0 15.3 ns 9, 12, 13 THIGH 3V66 HIGH Time 4.95 4.95 4.95 4.95 ns 23 TLOW 3V66 LOW Time 4.55 4.55 4.55 4.55 ns 24 TR/TF 3V66 Rise and Fall Times 0.5 2.0 0.5 2.0 0.5 2.0 0.5 2.0 ns 25 TSKEW Unbuffered 3V66 to 3V66 Clock Skew 500 500 500 500 ps 12, 13 TSKEW Buffered 3V66 to 3V66 Clock Skew 250 250 250 250 ps 12, 13 TCCJ DRCG Cycle to Cycle Jitter 250 250 250 250 ps 12, 13 Notes: 20. Measurement taken from differential waveform, from –0.35V to +0.35V. 21. Measurements taken from common mode waveforms, measure rise/fall time from 0.41 to 0.86V. Rise/fall time matching is defined as “the instantaneous difference between maximum CLK rise (fall) and minimum CLK# fall (rise) time or minimum CLK rise (fall) and maximum CLK# fall (rise) time.” This parameter is designed form waveform symmetry. 22. Measured in absolute voltage, i.e., single-ended measurement. 23. THIGH is measured at 2.4V for non-host outputs. 24. TLOW is measured at 0.4V for all outputs. 25. Probes are placed on the pins, and measurements are acquired between 0.4V and 2.4V for 3.3V signals (see test and measurement set-up section of this data sheet). AC Parameters (VDD = VDDA = 3.3V ±5%, TA = 0°C to +70°C) (continued) Parameter Description 66 MHz 100 MHz 133 MHz 200 MHz Unit Notes Min. Max. Min. Max. Min. Max. Min. Max. |
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