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HT95C200 Datasheet(PDF) 4 Page - Holtek Semiconductor Inc |
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HT95C200 Datasheet(HTML) 4 Page - Holtek Semiconductor Inc |
4 / 50 page Pin Description Pin Name I/O Description CPU VDD ¾ Positive power supply VDD2 Positive power supply for FSK decoder VSS ¾ Negative power supply, ground VSS2 Negative power supply for FSK decoder, ground X1 I A 32768Hz crystal (or resonator) should be connected to this pin and X2. X2 O A 32768Hz crystal (or resonator) should be connected to this pin and X1. XC I External low pass filter used for frequency up conversion circuit. RES I Schmitt trigger reset input, active low. INT/TMR1 I Schmitt trigger input for external interrupt or Timer/Event Counter 1. No internal pull-high resistor. For INT: Edge trigger activated on a falling edge. For TMR1: Activated on falling or rising transition edge, selected by software. TMR0 I Schmitt trigger input for Timer/Event Counter 0. No internal pull-high resistor. Activated on falling or rising transition edge, selected by software. HT95C200/20P/300/30P Rev. 0.10 4 October 1, 2002 Preliminary 1 2 6 1 2 7 H T 9 5 C 2 0 0 / 2 0 P 1 2 8 Q . P - A 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 4 0 5 1 5 2 5 3 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 1 2 8 N C N C N C N C N C N C N C P A 7 P A 6 P A 5 P A 4 P A 3 P A 2 P A 1 P A 0 P B 7 P B 6 P B 5 P B 4 P B 3 P B 2 P B 1 P B 0 X M U T E D N P O P O H K S H D O H D I H . O H . I V S S V D D I N T / T M R 1 N C N C N C N C 3 9 5 4 5 5 5 6 5 7 5 8 5 9 6 0 6 1 6 2 6 3 6 4 N C N C N C N C N C N C N C N C N C N C N C N C C O M 1 0 C O M 1 1 C O M 1 2 C O M 1 3 C O M 1 4 C O M 1 5 S E G 0 S E G 1 S E G 2 S E G 3 S E G 4 S E G 5 S E G 6 S E G 7 S E G 8 S E G 9 S E G 1 0 S E G 1 1 S E G 1 2 S E G 1 3 S E G 1 4 S E G 1 5 N C N C N C N C 1 2 5 1 2 2 1 2 3 1 2 4 1 2 1 1 2 0 1 1 9 1 1 8 1 1 7 1 1 6 1 1 5 1 1 4 1 1 3 1 1 2 1 1 1 1 1 0 1 0 9 1 0 8 1 0 7 1 0 6 1 0 5 1 0 4 1 0 3 1 0 2 1 0 1 1 0 0 9 9 9 8 9 7 9 6 9 5 9 4 9 3 9 2 9 1 9 0 8 9 8 8 8 7 8 6 8 5 8 4 8 3 8 2 8 1 8 0 7 9 7 8 7 7 7 6 7 5 7 4 7 3 7 2 7 1 7 0 6 9 6 8 6 7 6 6 6 5 |
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