Philips Semiconductors

PSMN006-20K

TrenchMOS™ ultra low level FET

Product data

Rev. 01 — 30 May 2002

3 of 12

9397 750 09631

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

Fig 1.

Normalized total power dissipation as a

function of solder point temperature.

Fig 2.

Normalized continuous drain current as a

function of solder point temperature.

Fig 3.

Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

03aa17

0

40

80

120

0

50

100

150

200

Tsp (°C)

Pder

(%)

03aa25

0

40

80

120

0

50

100

150

200

Tsp (°C)

Ider

(%)

P

der

P

tot

P

tot 25 C

°

()

-----------------------

100%

×

=

I

der

I

D

I

D25 C

°

()

-------------------

100%

×

=

03ai63

10-1

1

10

102

10-1

1

10

102

VDS (V)

ID

(A)

DC

100 ms

10 ms

Limit RDSon = VDS / ID

1 ms

tp = 10 µs