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PHP63NQ03LT Datasheet(PDF) 2 Page - NXP Semiconductors |
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PHP63NQ03LT Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 14 page Philips Semiconductors PHP/PHB/PHD63NQ03LT TrenchMOS™ logic level FET Product data Rev. 01 — 14 June 2002 2 of 14 9397 750 09822 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 3. Limiting values Table 2: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage (DC) 25 °C ≤ T j ≤ 175 °C - 30 V VDGR drain-gate voltage (DC) 25 °C ≤ T j ≤ 175 °C; RGS =20kΩ -30 V VGS gate-source voltage (DC) - ±20 V VGSM peak gate-source voltage tp ≤ 50 µs; pulsed; duty cycle = 25 % - ±25 V ID drain current (DC) Tmb =25 °C; VGS =10V; Figure 2 and 3 - 68.9 A Tmb = 100 °C; VGS =10V; Figure 2 - 48.7 A IDM peak drain current Tmb =25 °C; pulsed; tp ≤ 10 µs; Figure 3 - 240 A Ptot total power dissipation Tmb =25 °C; Figure 1 - 111 W Tstg storage temperature −55 +175 °C Tj junction temperature −55 +175 °C Source-drain diode IS source (diode forward) current (DC) Tmb =25 °C - 68.9 A ISM peak source (diode forward) current Tmb =25 °C; pulsed; tp ≤ 10 µs - 48.7 A |
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