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NCV887103D1R2G Datasheet(PDF) 11 Page - ON Semiconductor |
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NCV887103D1R2G Datasheet(HTML) 11 Page - ON Semiconductor |
11 / 17 page NCV8871 www.onsemi.com 11 operation should be verified empirically. The worst case VIN is half of VOUT, or whatever VIN is closest to half of VOUT. After choosing a peak current ripple value, calculate the inductor value as follows: L + V IN(WC) DWC DI L,max fs Where: VIN(WC): VIN value as close as possible to half of VOUT [V] DWC: duty cycle at VIN(WC) DIL,max: maximum peak to peak ripple [A] The maximum average inductor current can be calculated as follows: I L,AVG + V OUTIOUT(max) V IN(min)h The Peak Inductor current can be calculated as follows: I L,peak + IL,avg ) DI L,max 2 Where: IL,peak: Peak inductor current value [A] 4. Select Output Capacitors The output capacitors smooth the output voltage and reduce the overshoot and undershoot associated with line transients. The steady state output ripple associated with the output capacitors can be calculated as follows: V OUT(ripple) + DI OUT(max) fC OUT ) I OUT(max) 1 * D ) V IN(min)D 2fL R ESR The capacitors need to survive an RMS ripple current as follows: I Cout(RMS) + IOUT D WC D WC ) D WC 12 D WC L R OUT T SW 2 The use of parallel ceramic bypass capacitors is strongly encouraged to help with the transient response. 5. Select Input Capacitors The input capacitor reduces voltage ripple on the input to the module associated with the ac component of the input current. I Cin(RMS) + V IN(min) 2 D WC LfsVOUT23 6. Select Feedback Resistors The feedback resistors form a resistor divider from the output of the converter to ground, with a tap to the feedback pin. During regulation, the divided voltage will equal Vref. The lower feedback resistor can be chosen, and the upper feedback resistor value is calculated as follows: Rupper + Rlower Vout * Vref V ref The total feedback resistance (Rupper + Rlower) should be in the range of 1 k W – 100 kW. 7. Select Compensator Components Current Mode control method employed by the NCV8871 allows the use of a simple, Type II compensation to optimize the dynamic response according to system requirements. 8. Select MOSFET(s) In order to ensure the gate drive voltage does not drop out the MOSFET(s) chosen must not violate the following inequality: Q g(total) v I drv fs Where: Qg(total): Total Gate Charge of MOSFET(s) [C] Idrv: Drive voltage current [A] fs: Switching Frequency [Hz] The maximum RMS Current can be calculated as follows: I Q(max) + Iout D D The maximum voltage across the MOSFET will be the maximum output voltage, which is the higher of the maximum input voltage and the regulated output voltaged: V Q(max) + VOUT(max) 9. Select Diode The output diode rectifies the output current. The average current through diode will be equal to the output current: I D(avg) + IOUT(max) Additionally, the diode must block voltage equal to the higher of the output voltage and the maximum input voltage: V D(max) + VOUT(max) The maximum power dissipation in the diode can be calculated as follows: P D + Vf (max) IOUT(max) Where: Pd: Power dissipation in the diode [W] Vf(max): Maximum forward voltage of the diode [V] 10. Determine Feedback Loop Compensation Network The purpose of a compensation network is to stabilize the dynamic response of the converter. By optimizing the compensation network, stable regulation response is achieved for input line and load transients. Compensator design involves the placement of poles and zeros in the closed loop transfer function. Losses from the boost inductor, MOSFET, current sensing and boost diode losses also influence the gain and compensation expressions. The OTA has an ESD protection structure (RESD ≈ 502 W, data not provided in the datasheet) located on the die between the OTA output and the IC package compensation pin (VC). The information from the OTA PWM feedback control signal (VCTRL) may differ from the IC-VC signal if R2 is of similar order of magnitude as RESD. |
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