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FAN53703 Datasheet(PDF) 10 Page - ON Semiconductor |
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FAN53703 Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 13 page FAN53701, FAN53702, FAN53703 www.onsemi.com 10 Applications Information Selecting the Inductor The output inductor must meet both the required inductance and the energy -handling capability of the application. The inductor value affects average current limit, output voltage ripple, and efficiency. The ripple current ( DI) of the regulator is: DI [ V OUT V IN @ V IN * VOUT L @ f SW (eq. 1) The maximum average load current, IMAX(LOAD), is related to the peak current limit, ILIM(PK) , by the ripple current, given by: I MAX(LOAD) + ILIM(PK) * DI 2 (eq. 2) The transition between PFM and PWM operation is determined by the point at which the inductor valley current crosses zero. The regulator DC current when the inductor current crosses zero, IDCM, is: I DCM + DI 2 (eq. 3) The FAN5370X is optimized for operation with L = 1.0 mH, but is stable with inductances up to 1.3 mH (nominal). The inductor should be rated to maintain at least 80% of its value at ILIM(PK) . Efficiency is affected by the inductor DCR and inductance value. Decreasing the inductor value for a given physical size typically decreases the DCR; but because DI increases, the RMS current increases, as do the core and skin effect losses. I RMS + I OUT(DC) 2 ) DI 2 12 (eq. 4) The increased RMS current produces higher losses through the RDS(ON) of the IC MOSFETs , as well as the inductor DCR . Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current and higher DCR. Table 9 shows the effects of inductance higher or lower than the recommended 1.0 mH on regulator performance. Output Capacitor Increasing COUT has no effect on loop stability and can therefore be increased to reduce output voltage ripple or to improve transient response. Vice versa, lower COUT can be used but with a compromise of load transient response. Output voltage ripple, DVOUT, is: DV OUT + DIL f SW @ COUT @ ESR 2 2 @ D @ (1 * D) ) 1 8 @ f SW @ COUT (eq. 5) Input Capacitor The 2.2 mF ceramic input capacitor should be placed as close as possible between the VIN pin and GND to minimize the parasitic inductance. If a long wire is used to bring power to the IC, additional “bulk” capacitance (electrolytic or tantalum) should be placed between CIN and the power source lead to reduce the ringing that can occur between the inductance of the power source leads and CIN . The effective capacitance value decreases as VIN increases due to DC bias effects. PCB Layout Guidelines 1. The input capacitor (CIN) should be connected as close as possible to the VIN and GND pins. Connect to VIN and GND using only top metal. Do not route through vias (see Figure 26.) 2. Place the inductor (L) as close as possible to the IC. Use short wide traces for the main current paths. 3. An output capacitor (COUT) should be placed as close as possible to the IC. Connection to GND should only be on top metal. Feedback signal connection to VOUT should be routed away from noisy components and traces (e.g. SW line) . Table 9. EFFECTS OF CHANGES in Inductor Value (from 1.0 mH Recommended Value) on Regulator Performance Inductor Value IMAX(LOAD) DVOUT Transient Response Increase Increase Decrease Degraded Decrease Decrease Increase Improved |
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