Radiometrix Ltd

DWA3 Data Sheet

page 2

Pin description

Pin

Name

Function

1

GND

Ground

2

Vcc

5V regulated power supply (4.75 - 5.25v)

3

ENABLE

Pull low to enable module

4

SETUP

Pull low to enter Test/Setup mode (5V CMOS logic. Pull up to 5V)

5

TXD

Transmit Data (Inverted RS232 in at 5V CMOS logic, No pullup)

6

NC

No Pin

7

RXD

Receive Data (Inverted RS232 output at 5V CMOS logic output)

8

STATUS

RX Busy, Data in receive buffer (5V CMOS logic output)

9

GND

Ground

NOTE:

1. ENABLE and SETUP have 10K pullups to Vcc. TXD has none (if used in RX only, tie this pin to +5v)

2. Vcc must be a 5v regulated supply (4.75 - 5.25v)

3. Pinout is as TDL2A. (It is, however, longer than 33mm, with a ceramic patch antenna replacing the

RF pins)

3. TXD / RXD are inverted RS232 at 5v cmos levels. To connect to a true RS232 device, inverting level

shifters must be used (MAX232 type are ideal, but simple NPN transistor switches with pullups often

suffice). With typical microcontrollers and uarts, direct connection is possible.

3a DWA3 is compatible with the TDi2 interface board (which provides a MAX232 type buffer, 9 way D

connector, 5v voltage regulator and support circuits) provided the SMA RF connector is not fitted. This

board is 61mm x 33mm in size.

4. Rx_busy pin goes high when valid data is present in the receive buffer.

5. The DWA3 provides a half duplex link, but provided no two devices attempt to transmit at one time

(a 'low' on RX_busy may be used as a primitive 'CTS' indication) no further restrictions on data

transmission need be made, as all transmit timing, valid data identification and datastream buffering

is conducted by the unit. There is no 'transmit enable' pin.

Sync and framing words in the packet prevent the receiver outputting garbage in the absence of signal

or presence of interference.

6. A simple addressing structure is included in the datastream. Units may be programmed onto one of

eight addresses (all units are supplied set to default addr=0)

7. DWA3 uses a BiM3 series transceiver module (e.g. BiM3A-914-64, BiM3B-869-64) and the cpu

circuitry of the TDL3F

8. This unit is programmed exactly as a TDL2A, with the channel select commands being ignored.

Figure 2: DWA3 footprint (top view)