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SLG46169 Datasheet(PDF) 30 Page - Dialog Semiconductor |
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SLG46169 Datasheet(HTML) 30 Page - Dialog Semiconductor |
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30 / 102 page  000-0046169-105 Page 29 of 101 SLG46169 7.6 Matrix OE IO Structure 7.6.1 Matrix OE IO Structure (for Pins 4, 6, 7, 10, 12, 13) Figure 3. Matrix OE IO Structure Diagram PAD Digital In S0 S1 pull_up_en 10 k 90 k 900 k Res_sel[1:0] 00: floating 01: 10 k 10: 100 k 11: 1 M wosmt_en smt_en lv_en Low Voltage Input Schmitt Trigger Input Non-Schmitt Trigger Input Input Mode [1:0] 00: Digital In without Schmitt Trigger, wosmt_en=1 01: Digital In with Schmitt Trigger, smt_en=1 10: Low Voltage Digital In mode, lv_en = 1 11: analog IO mode Output Mode [1:0] 00: 1x push-pull mode, pp1x_en=1 01: 2x push-pull mode, pp2x_en=1, pp1x_en=1 10: 1x NMOS open drain mode, od1x_en=1 11: 2x NMOS open drain mode, od2x_en=1, od1x_en=1 Analog IO (For PINs 6, 12 and 13 only ) Digital Out Digital Out OE od2x_en OE od1x_en Digital Out OE pp2x_en Digital Out OE pp1x_en |
Similar Part No. - SLG46169 |
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Similar Description - SLG46169 |
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