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O917A14DTRGZRQ1 Datasheet(PDF) 5 Page - Texas Instruments |
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O917A14DTRGZRQ1 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 89 page 5 TPS65917-Q1 www.ti.com SLVSCO4C – JULY 2015 – REVISED MARCH 2017 Submit Documentation Feedback Product Folder Links: TPS65917-Q1 Revision History Copyright © 2015–2017, Texas Instruments Incorporated 2 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (November 2015) to Revision C Page • First public release of full data sheet ............................................................................................... 1 • Added recommendation for external pulldown resistor on the LDOVRTC_OUT pin in the Pin Attributes table ......... 7 • Added OTP to the PU/PD selection for GPIO_1 as NRESWARM in the Signal Descriptions table ...................... 9 • Changed the caption of the SMPS Efficiency For SMPS1 and SMPS 2 in Dual-Phase PWM Mode graph to SMPS Load Regulation for SMPS1 and SMPS2 Single-Phase PWM Mode in the Typical Characteristics section ... 26 • Added the SMPS Load regulation for SMPS3, PWM Mode graph to the Typical Characteristics section .............. 26 • Changed single-phase to dual-phase and increased the output current to 7 A in the SMPS Load Regulation for SMPS12 graph in the Typical Characteristics section .......................................................................... 26 • Changed the debounce for PWRON to N/A in the ON Requests table ...................................................... 33 • Added description of VIO power-up timing in the Device Power Up Timing section ....................................... 37 • Changed the description of the LDOVRTC when in the BACKUP and OFF states and added a note in the LDOVRTC section .................................................................................................................. 49 • Added the note and pulldown equations to the System Voltage Monitoring section ....................................... 66 • Changed the SMPS1 voltage, SMPS2 voltage, and LDO2 voltage in the Design Parameters table ................... 71 • Changed the Electrostatic Discharge Caution statement ...................................................................... 81 Changes from Revision A (November 2015) to Revision B Page • Added statement to the Current Monitoring and Short Circuit Detection section that the SMPS_SHORT_REGISTER bit will keep a resource off until it is cleared ................................................. 45 Changes from Original (July 2015) to Revision A Page • Deleted the PPU type and changed the connection from floating to VRTC for the GPIO_1 pin when used only as an input with the secondary function as NRESWARM .......................................................................... 7 • Updated Max value of Device Off Mode Current Consumption from 45 µA to 55 µA ..................................... 19 • Changed the units for the x axis from mA to A in graphs D002 to D008 ................................................... 26 • Added register names for the GPADC channel 3 D1 & D2 trim when HIGH_VCC_SENSE = 1 ......................... 53 |
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