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TPS254900AIRVCTQ1 Datasheet(PDF) 19 Page - Texas Instruments |
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TPS254900AIRVCTQ1 Datasheet(HTML) 19 Page - Texas Instruments |
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(OUT) (FB) (G) (FA ) (FB) (G) V R R R V / R = - - FA DS(on) (WIRE) (CS) R (r R ) / G = + IN OUT CS R1 R3 To Regulator OUT To Load To Regulator Resistor Divider V (OUT) R (FA) R (G) R (FB) FB C (BUS) R (WIRE) R (LOAD) C (COMP) r DS(on) R2 19 TPS254900A-Q1 www.ti.com SLUSCU5A – NOVEMBER 2017 – REVISED JANUARY 2018 Product Folder Links: TPS254900A-Q1 Submit Documentation Feedback Copyright © 2017–2018, Texas Instruments Incorporated Figure 38. Cable Compensation Equivalent Circuit 8.3.2.1 Design Procedure To start the procedure, the total resistance, including the power switch rDS(on) and wire resistance R(WIRE), must be known. 1. Choose R(G) following the voltage-regulator feedback resistor-divider design guideline. 2. Calculate R(FA) according to Equation 1. (1) 3. Calculate R(FB) according to Equation 2. (2) 4. C(COMP) in parallel with R(FA) is required to stablilize V(OUT) when C(BUS) is large. Start with C(COMP) ≥ 3 × G(CS) × C(OUT), then adjust C(COMP) to optimize the load transient of the voltage regulator output. V(OUT) stability should always be verified in the end application circuit. 8.3.3 D+ and D– Protection D+ and D– protection consists of ESD and OVP (overvoltage protection). The DP_IN and DM_IN pins provide ESD protection up to ±15 kV (air discharge) and ±8 kV (contact discharge) per IEC 61000-4-2 (see the ESD Ratings section for test conditions). The ESD stress seen at DP_IN and DM_IN is impacted by many external factors, like the parasitic resistance and inductance between ESD test points and the DP_IN and DM_IN pins. For air discharge, the temperature and humidity of the environment can cause some difference, so the IEC performance should always be verified in the end-application circuit. The IEC ESD performance of the TPS254900A-Q1 device depends on the capacitance connected from BIAS to GND. A 2.2-µF capacitor placed close to the BIAS pin is recommended. Connect the BIAS pin to OUT using a 5.1-kΩ resistor as a discharge path for the ESD stress. OVP protection is provided for short-to-VBUS or short-to-battery conditions in the vehicle harness, preventing damage to the upstream USB transceiver or hub. When the voltage on DP_IN or DM_IN exceeds 3.9 V (typical), the TPS254900A-Q1 device quickly responds to block the high-voltage reverse connection to DP_OUT and DM_OUT. Overcurrent short-to-GND protection for D+ and D– is provided by the upstream USB transceiver. 8.3.4 VBUS OVP Protection The TPS254900A-Q1 OUT pin can withstand up to 18 V. The internal MOSFET turns off quickly when a short-to- battery condition occurs. |
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