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TPS254900A-Q1 Datasheet(PDF) 8 Page - Texas Instruments |
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TPS254900A-Q1 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 39 page 
8 TPS254900A-Q1 SLUSCU5A – NOVEMBER 2017 – REVISED JANUARY 2018 www.ti.com Product Folder Links: TPS254900A-Q1 Submit Documentation Feedback Copyright © 2017–2018, Texas Instruments Incorporated (1) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty. 6.6 Switching Characteristics Unless otherwise noted –40°C ≤ TJ ≤ 125°C and 4.5 V ≤ V(IN) ≤ 6.5 V, V(EN) = V(IN), V(CTL1) = V(CTL2) = V(IN). R(FAULT) = R(STATUS) = 10 kΩ, R(IMON) = 2.55 KΩ, R(ILIM_HI) = 19.1 kΩ, R(ILIM_LO) = 80.6 kΩ. Positive currents are into pins. Typical values are at 25°C. All voltages are with respect to GND. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tr OUT voltage rise time V(IN) = 5 V, C(L) = 1 µF, R(L) = 100 Ω 1.05 1.75 3.1 ms tf OUT voltage fall time 0.27 0.47 0.82 ms ton OUT voltage turnon time V(IN) = 5 V, C(L) = 1 µF, R(L) = 100 Ω 7.5 11 ms toff OUT voltage turnoff time 2.7 5 ms t(DCHG_S) Discharge hold time (mode change) Time V(OUT) < 0.7 V 1.1 2 2.9 s t(IOS) OUT short-circuit response time(1) V(IN) = 5 V, R(SHORT) = 50 mΩ 2 µs t(OC_OUT_FAULT) OUT FAULT deglitch time Bidirectional deglitch applicable to current-limit condition only (no deglitch assertion for OTSD) 5.5 8.5 11.5 ms tpd Analog switch propagation delay (1) V(IN) = 5 V 0.14 ns t(SK) Analog switch skew between opposite transitions of the same port (tPHL – tPLH) (1) V(IN) = 5 V 0.02 ns t(LD_SET) Load-detect set time V(IN) = 5 V 120 210 280 ms t(LD_RESET) Load-detect reset time V(IN) = 5 V 1.8 3 4.2 s t(OV_Data) DP_IN and DM_IN overvoltage protection response time 5 µs t(OV_OUT) OUT overvoltage protection response time 0.3 µs t(OV_D_FAULT) DP_IN and DM_IN FAULT- asserted degltich time 11 16 23 ms OUT FAULT-asserted degltich time 11 16 23 ms |
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