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IDT5V9351 Datasheet(PDF) 5 Page - Integrated Device Technology

Part No. IDT5V9351
Description  LOW VOLTAGE PLL CLOCK DRIVER
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT5V9351 Datasheet(HTML) 5 Page - Integrated Device Technology

 
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INDUSTRIALTEMPERATURERANGE
IDT5V9351
LOWVOLTAGEPLLCLOCKDRIVER
5
PLL INPUT REFERENCE CHARACTERISTICS
VCC = 3.3V ± 5%, TA = -40°C to +85°C
Symbol
Parameter
Min.
Max
Unit
tR, tF
TCLK Input Rise/Fall Levels, 0.8V to 2V
1
ns
÷2feedback
100
200
fREF
ReferenceInputFrequency(1)
÷4feedback
50
100
MHz
÷8feedback
25
50
StaticTestMode
0
300
fREFDC
Reference Input Duty Cycle
25
75
%
NOTE:
1. Maximum and minimum input reference is limited by the VCO lock range and the feedback divider for the TCLK or PECL_CLK inputs.
AC ELECTRICAL CHARACTERISTICS (1)
TA = -40°C to +85°C, VCC = 3.3V ± 5%
Symbol
Parameter
Conditions
Min.
Typ.
Max
Unit
tR, tF
OutputRise/FallTime
0.55V to 2.4V
0.1
1
ns
VPP
Peak-to-PeakInputVoltage
LVPECL
500
1000
mV
VCMR
CommonModeRange(2)
LVPECL
1.2
VCC - 0.9
V
100-200 MHz
45
50
55
tPW
Output Duty Cycle
50-100 MHz
47.5
50
52.5
%
25-50 MHz
48.75
50
51.75
tSK(O)
OutputtoOutputSkew
150
ps
fVCO
PLL VCO Lock Range
200
400
MHz
÷2output
100
200
fMAX
MaximumOutputFrequency
÷4output
50
100
MHz
÷8output
25
50
tPD
PropagationDelay(StaticPhaseOffset)
TCLK to FBIN
-50
150
ps
PECL_CLK to FBIN
25
325
tPLZ,tPHZ
OutputDisableTime
10
ns
tPZL,tPZH
OutputEnableTime
10
ns
÷2feedback
-3dbpointof
9 - 20
BW
PLLClosedLoopBandwidth
÷4feedback
PLLtransfer
3 - 9.5
MHz
÷8feedback
characteristic
1.2 - 2.1
tJ
Cycle-to-Cycle Jitter
÷ 4feedback
RMS Value
10
22
ps
(SingleOutputFrequencyConfiguration)
tJIT(PER)
PeriodJitter
÷ 4feedback
RMS Value
8
15
ps
(SingleOutputFrequencyConfiguration)
tJIT(
φ)
I/O Phase Jitter
RMS Value
4 - 17
ps
tLOCK
Maximum PLL Lock Time
1
ms
NOTES:
1. AC Characteristics apply for parallel output termination of 50
Ω to VTT.
2. VCMR(AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the VCMR range and the input swing lies within VPP(AC)
specifications.


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