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AD9278 Datasheet(PDF) 6 Page - Analog Devices |
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AD9278 Datasheet(HTML) 6 Page - Analog Devices |
6 / 45 page Data Sheet AD9278 Rev. A | Page 5 of 44 Parameter1 Test Conditions/Comments Min Typ Max Unit Input-Referred Noise Voltage RS = 0 Ω, RFB = ∞ LNA gain = 15.6 dB 2.0 nV/√Hz LNA gain = 17.9 dB 1.9 nV/√Hz LNA gain = 21.3 dB 1.8 nV/√Hz Noise Figure RS = 50 Ω, RFB = ∞ LNA gain = 15.6 dB 7.8 dB LNA gain = 17.9 dB 7.3 dB LNA gain = 21.3 dB 6.9 dB Input-Referred Dynamic Range RS = 0 Ω, RFB = ∞ LNA gain = 15.6 dB 162 dBFS/√Hz LNA gain = 17.9 dB 160 dBFS/√Hz LNA gain = 21.3 dB 157 dBFS/√Hz Output-Referred SNR −3 dBFS input, fRF = 2.5 MHz, f4LO = 10 MHz, 1 kHz offset 153 dBc/√Hz Two-Tone Intermodulation (IMD3) fRF1 = 5.015 MHz, fRF2 = 5.020 MHz, f4LO = 20 MHz, ARF1 = −1 dBFS, ARF2 = −21 dBFS, IMD3 relative to ARF2 −58 dB Quadrature Phase Error I to Q, all phases, 1 σ 0.15 Degrees I/Q Amplitude Imbalance I to Q, all phases, 1 σ 0.015 dB Channel-to-Channel Matching Phase I to I, Q to Q, 1 σ 0.5 Degrees Amplitude I to I, Q to Q, 1 σ 0.25 dB POWER SUPPLY, MODE I/II/III/IV AVDD1 1.7 1.8 1.9 V AVDD23 2.7 3.0 3.6 V DRVDD 1.7 1.8 1.9 V IAVDD1 TGC mode 178/145/ 215/260 mA CW Doppler mode 32 mA IAVDD2 TGC mode, no signal 108 mA CW Doppler mode 63 mA IDRVDD ANSI-644 mode 47/44/48/53 mA Low power (IEEE 1596.3 similar) mode 33/31/34/38 Total Power Dissipation (Including Output Drivers) TGC mode, no signal 704/640/ 772/860 815/755/ 908/996 mW CW Doppler mode 252 mW Power-Down Dissipation 5 mW Standby Power Dissipation 420 mW Power Supply Rejection Ratio (PSRR) 1.6 mV/V ADC RESOLUTION 12 Bits ADC REFERENCE Output Voltage Error VREF = 1 V ±50 mV Load Regulation at 1.0 mA VREF = 1 V 2 mV Input Resistance 6 kΩ 1 See the AN-835 Application Note, UnderstandingHigh SpeedADC Testing andEvaluation, for a complete set of definitions and information about how these tests were completed. 2 The overrange condition is specified as 6 dB more than the full-scale input range. 3 When the LNA gain is set to 15.6 dB, AVDD2 >3.0 V. |
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