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DS88C120 Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. DS88C120
Description  Dual CMOS Compatible Differential Line Receiver
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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DS88C120 Datasheet(HTML) 3 Page - National Semiconductor (TI)

 
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Electrical Characteristics (Notes 2 and 3) (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VIL
Logical ‘‘0’’ Strobe Input
VOH VCC b 12V
VCC e 5V
25
15
V
Voltage
IOUT eb200 mA
VCC e 10V
50
20
V
VCC e 15V
75
25
V
IOS
Output Short-Circuit Current
VOUT e 0V VCC e 15V VSTROBE e 0V (Note 4)
b
5
b
20
b
40
mA
Note 1
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2
Unless otherwise specified minmax limits apply across the b55 Cto a125 C temperature range for the DS78C120 and across the 0 Cto a70 C range
for the DS88C120 All typical values for TA e 25 C VCC e 5V and VCM e 0V
Note 3
All currents into device pins shown as positive out of device pins as negative all voltages referenced to ground unless otherwise noted All values shown
as max or min on absolute value basis
Note 4
Only one output at a time should be shorted
Note 5
Refer to EIA-RS422 for exact conditions
Switching Characteristics VCC e 5V TA e 25 C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tpd0(D)
Differential Input to ‘‘0’’ Output
CL e 50 pF
60
100
ns
tpd1(D)
Differential Input to ‘‘1’’ Output
CL e 50 pF
100
150
ns
tpd0(S)
Strobe Input to ‘‘0’’ Output
CL e 50 pF
30
70
ns
tpd1(S)
Strobe Input to ‘‘1’’ Output
CL e 50 pF
100
150
ns
AC Test Circuit and Switching Time Waveforms
Differential and Strobe Input Signal
Includes probe and test fixture capacitance
TLF5801 – 3
tr e tf s 10 ns
PRR e 1 MHz
TLF5801 – 4
Note
Optimum switching response is obtained by minimizing stray capacitance on Response Control pin (no external connection)
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