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CYM1851P6-25C Datasheet(PDF) 1 Page - Cypress Semiconductor

Part # CYM1851P6-25C
Description  1,024K x 32 Static RAM Module
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYM1851P6-25C Datasheet(HTML) 1 Page - Cypress Semiconductor

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1,024K x 32 Static RAM Module
CYM1851
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
Document #: 38-05274 Rev. **
Revised March 15, 2002
51
Features
• High-density 32-megabit SRAM module
• 32-bit Standard Footprint supports densities from 16K
x 32 through 1M x 32
• High-speed SRAMs
— Access time of 12 ns
• Low active power
— 8.36W (max.) at 12 ns
• 72 pins
• Available in ZIP, SIMM, or angled SIMM format
Functional Description
The CYM1851 is a high-performance 32-megabit static RAM
module organized as 1,024K words by 32 bits. This module is
constructed from eight 1,024K x 4 SRAMs in SOJ packages
mounted on an epoxy laminate substrate. Four chip selects are
used to independently enable the four bytes. Reading or writ-
ing can be executed on individual bytes or any combination of
multiple bytes through proper use of selects.
The CYM1851 is designed for use with standard 72-pin SIMM
sockets. The pinout is downward compatible with the 64-pin
JEDEC ZIP/SIMM module family (CYM1821, CYM1831,
CYM1836, and CYM1841). Thus, a single motherboard de-
sign can be used to accommodate memory depth ranging from
16K words (CYM1821) to 1,024K words (CYM1851). The
CYM1851 is offered in vertical and angled SIMM configura-
tions and both are available with either tin-lead or 10 mi-
cro-inches of gold flash on the edge contacts.
Presence detect pins (PD0–PD3) are used to identify module
memory density in applications where modules with alternate
word depths can be interchanged.
Logic Block Diagram
Pin Configuration
A0 –A19
OE
I/O0– I/O3
CS3
I/O4– I/O7
CS1
20
4
4
4
4
4
4
4
4
CS2
CS4
I/O8– I/O11
I/O16– I/O19
I/O24– I/O27
I/O12– I/O15
I/O20– I/O23
I/O28– I/O31
PD0 -GND
PD1 -OPEN
PD2 -GND
PD3 -OPEN
WE
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
1M x 4
SRAM
ZIP/SIMM
Top View
NC
A4
PD3
PD2
PD0
GND
I/O0
PD1
I/O1
I/O8
I/O2
I/O9
I/O3
VCC
A7
I/O11
I/O10
A0
I/O6
GND
NC
A15
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
I/O7
WE
A8
A9
I/O4
I/O5
A14
CS1
CS3
A16
GND
I/O16
I/O17
A12
A13
I/O20
I/O21
I/O22
I/O14
I/O15
A1
A2
I/O12
I/O13
CS2
I/O18
I/O19
A10
A11
CS4
A17
OE
I/O24
I/O25
VCC
A6
I/O28
I/O29
I/O26
I/O27
A3
A5
66
68
70
65
67
69
I/O23
GND
A19
I/O30
I/O31
A18
72
71
NC
NC


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