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AD5593R Datasheet(PDF) 5 Page - Analog Devices |
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AD5593R Datasheet(HTML) 5 Page - Analog Devices |
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5 / 34 page  AD5593R Data Sheet Rev. C | Page 4 of 33 Parameter Min Typ Max Unit Test Conditions/Comments Load Regulation 200 µV/mA VDD = 5 V ± 10%, DAC code = midscale, −10 mA ≤ IOUT ≤ +10 mA 200 µV/mA VDD = 3 V ± 10%, DAC code = midscale, −10 mA ≤ IOUT ≤ +10 mA Power-Up Time 7 µs Exiting power-down mode, VDD = 5 V AC SPECIFICATIONS Slew Rate 1.25 V/µs Settling Time 6 µs DAC Glitch Impulse 2 nV-sec DAC to DAC Crosstalk 1 nV-sec Digital Crosstalk 0.1 nV-sec Analog Crosstalk 1 nV-sec Digital Feedthrough 0.1 nV-sec Multiplying Bandwidth 240 kHz DAC code = full scale, output range = 0 V to 2 × VREF Output Voltage Noise Spectral Density 200 nV/√Hz DAC code = midscale, output range = 0 V to 2 × VREF, measured at 10 kHz SNR 81 dB SFDR 77 dB SINAD 74 dB Total Harmonic Distortion −76 dB REFERENCE INPUT VREF Input Voltage 1 VDD V DC Leakage Current −1 +1 µA No I/Ox pins configured as DACs VREF Input Impedance 12 kΩ DAC output range = 0 V to 2 × VREF 24 kΩ DAC output range = 0 V to VREF REFERENCE OUTPUT VREF Output Voltage 2.495 2.5 2.505 V VREF Temperature Coefficient 20 ppm/°C Capacitive Load Stability 5 μF RLOAD = 2 kΩ Output Impedance 0.15 Ω VDD = 2.7 V 0.7 Ω VDD = 5 V Output Voltage Noise 10 µV p-p 0.1 Hz to 10 Hz Density 240 nV/√Hz At ambient, f = 1 kHz, CL = 10 nF Line Regulation 20 µV/V At ambient, sweeping VDD from 2.7 V to 5.5 V 10 µV/V At ambient, sweeping VDD from 2.7 V to 3.3 V Load Regulation Sourcing 210 µV/mA At ambient, −5 mA ≤ load current ≤ +5 mA Sinking 120 µV/mA At ambient, −5 mA ≤ load current ≤ +5 mA Output Current Load Capability ±5 mA VDD ≥ 3 V GPIO OUTPUT ISOURCE and ISINK 1.6 mA Output Voltage High, VOH VDD − 0.2 V ISOURCE = 1 mA Low, VOL 0.4 V ISOURCE = 1 mA GPIO INPUT Input Voltage High, VIH VDD × 0.7 V Low, VIL VDD × 0.3 V Input Capacitance 20 pF Hysteresis 0.2 V Input Current ±1 µA |
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