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LMH6704MAX Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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LMH6704MAX Datasheet(HTML) 9 Page - National Semiconductor (TI) |
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9 / 12 page  Application Information (Continued) approximately 250 µA. Because of the pull up resistor on the disable circuit, the I CC and IEE currents (positive and nega- tive supply currents respectively) are not balanced in the disabled state. The positive supply current (I CC) is approxi- mately 350 µA while the negative supply current (I EE) is only 250 µA. The remaining I EE current of 100 µA flows through the disable pin. The disable function can be used to create analog switches or multiplexers. Implement a single analog switch with one LMH6704 positioned between an input and output. Create an analog multiplexer with several LMH6704’s. Use the cir- cuit shown in for multiplexer applications because there is no RG to shunt signals to ground. EVALUATION BOARDS National Semiconductor provides the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization. Many of the datasheet plots were measured with these boards. Device Package Evaluation Board Part Number LMH6704MA SOIC-8 CLC730227 LMH6704MF SOT23-6 CLC730216 An evaluation board is shipped upon request when a sample order is placed with National Semiconductor. DRIVING CAPACITIVE LOADS Capacitive output loading applications will benefit from the use of a series output resistor R ISO. Figure 7 shows the use of a series output resistor, R ISO, to stabilize the amplifier output under capacitive loading. Capacitive loads of 5 to 120 pF are the most critical, causing ringing, frequency response peaking and possible oscillation. The chart “Suggested R ISO vs. Cap Load” gives a recommended value for selecting a series output resistor for mitigating capacitive loads. The values suggested in the charts are selected for .5 dB or less of peaking in the frequency response. This gives a good compromise between settling time and bandwidth. For appli- cations where maximum frequency response is needed and some peaking is tolerable, the value of R ISO can be reduced slightly from the recommended values. LAYOUT CONSIDERATIONS Whenever questions about layout arise, use the evaluation board as a guide. The CLC730216 is the evaluation board supplied with samples of the LMH6704. To reduce parasitic capacitances ground and power planes should be removed near the input and output pins. For long signal paths con- trolled impedance lines should be used, along with imped- ance matching elements at both ends. Bypass capacitors should be placed as close to the device as possible. Bypass capacitors from each rail to ground are applied in pairs. The larger electrolytic bypass capacitors can be located farther from the device, the smaller ceramic capacitors should be placed as close to the device as possible. In Figure 1, Figure 2, and Figure 3 C SS is optional, but is recommended for best second order harmonic distortion. Another option to using C SS is to use pairs of 0.01 µF and 0.1 µF ceramic capacitors for each supply bypass. VIDEO PERFORMANCE The LMH6704 has been designed to provide excellent per- formance with production quality video signals in a wide variety of formats such as HDTV and High Resolution VGA. NTSC and PAL performance is nearly flawless with DG of 0.02% and DP of 0.02˚. Best performance will be obtained with back terminated loads. The back termination reduces reflections from the transmission line and effectively masks transmission line and other parasitic capacitances from the amplifier output stage. Figure 8 shows a typical configuration for driving a 75 Ω Cable. The amplifier is configured for a gain of two to make up for the 6 dB of loss in R OUT. POWER DISSIPATION Follow these steps to determine the Maximum power dissi- pation for the LMH6704: 1. Calculate the quiescent (no-load) power: P AMP =ICC* (VS), where VS =V + -V− 2. Calculate the RMS power dissipated in the output stage: P D (rms) = rms ((VS -VOUT)*IOUT), where VOUT and IOUT are the voltage and current across the external load and V S is the total supply current 3. Calculate the total RMS power: P T =PAMP+PD The maximum power that the LMH6704, package can dissi- pate at a given temperature can be derived with the following equation: 20103606 FIGURE 7. Decoupling Capacitive Loads 20103608 FIGURE 8. Typical Video Application www.national.com 9 |
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