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DS92LV8028 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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DS92LV8028 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 16 page Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V CC) −0.3V to +4V LVCMOS/LVTTL Input Voltage −0.3V to (V CC +0.3V) Bus LVDS Driver Output Voltage −0.3V to +3.9V Bus LVDS Output Short Circuit Duration 10ms Package Thermal Resistance θ JA 196 LBGA: 34˚C/W θ JC 196 LBGA: 8˚C/W Storage Temperature −65˚C to +150˚C Junction Temperature +125˚C Lead Temperature (Soldering, 10 seconds) +225˚C ESD Rating (HBM) ±3.0kV Reliability Information Transistor Count: 37.5k Recommended Operating Conditions Min Typ Max Units Supply Voltage (V CC) 3.0 3.3 3.6 V Operating Free Air Temperature (T A) −40 +25 +85 ˚C Clock Rate 25 66 MHz Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified.(Note 2) (Note 3) Symbol Parameter Conditions Pin/Freq. Min Typ Max Units LVCMOS/LVTTL DC Specifications V IH High Level Input Voltage DINn[0-9], TCLK, MS_PWDN, PWDNn, SYNCn, DEN, BIST_ACT, BIST_SEL<0:3> (Note 4) 2.0 V CC V V IL Low Level Input Voltage GND 0.8 V V CL Input Clamp Voltage I CL = −18 mA −0.87 −1.5 V I IN Input Current V IN = 0V or 3.6V −10 +/− 1 +10 µA Bus LVDS DC SpecificationsOver recommended operating supply and temperature unless otherwise specified. V OD Output Differential Voltage (DO+) - (DO-) RL = 100 Ω,C L = 10pF to GND DOn+, DOn- 350 500 550 mV ∆V OD Output Differential Voltage Unbalance 335 mV V OS Offset Voltage 1.1 1.2 1.3 V ∆V OS Offset Voltage Unbalance 2 35 mV I OS Output Short Circuit Current DO = 0V, Din = H, MS_PWDN and DEN = 2.4V −50 -90 mA I OZ Tri-State Output Current MS_PWDN or DEN = 0.8V, DO = 0V OR VDD -10 +/-1 10 µA I OX Power-Off Output Current VDD = 0V, DO = 0V or 3.6V -10 +/− 1 10 µA www.national.com 2 |
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