BAND SELECT MODE

The BS pin and BS bit can be used to select one of the two

RF VCO outputs. When using the BS pin, the BS bit must be

set to 0, and when using the BS bit, the BS pin must be tied

to ground. When using the BS pin, the state of the input must

exceed the minimum band select set up time prior to the LE

signal transition. The truth table summarizing the band select

logic is as follows:

TABLE 2. Band Select Modes

BS Pin

BS Bit

Mode

HIGH

0

PDC1500

LOW

0

PDC800

LOW

1

PDC1500

LOCK DETECT MODE

The LD output can be used to indicate the lock status of the

PLL. Bit 6 in Register R1 determines the signal that appears

on the LD pin. When the PLL is not locked, the LD pin

remains LOW. After obtaining phase lock, the LD pin will

have a logical HIGH level. The LD output is always LOW

when the LD register bit is 0 and in power down mode.

TABLE 3. Lock Detect Modes

LD Bit

Mode

0

Disable (GND)

1

Enable

TABLE 4. Lock Detect Logic

RF PLL Section

LD Output

Locked

HIGH

Not Locked

LOW

four or more consecutive cycles.

Note 17: Phase Error is determined on the leading edge. Only errors greater

both bands.

20068908

FIGURE 2. Lock Detect Timing Diagram Waveform (Notes 15, 16, 17, 18, 19)

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