IS62LV256L

Integrated Silicon Solution, Inc.

7

SR033-1A

04/27/99

Notes:

1. The internal write time is defined by the overlap of

CE LOW and WE LOW. All signals must be in valid states to initiate a Write,

but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling

edge of the signal that terminates the Write.

2. I/O will assume the High-Z state if

HIGH-Z

DATA UNDEFINED

DATA-IN VALID

ADDRESS

CE

WE

WRITE CYCLE NO. 2 (

CE

CE

CE

CE

ORDERING INFORMATION

Commercial Range: 0

Speed (ns)

Order Part No.

Package

15

IS62LV256L-15T

450-mil TSOP

IS62LV256L-15J

300-mil Plastic SOJ

20

IS62LV256L-20T

450-mil TSOP

IS62LV256L-20J

300-mil Plastic SOJ

25

IS62LV256L-25T

450-mil TSOP

IS62LV256L-25J

300-mil Plastic SOJ

ORDERING INFORMATION

Industrial Range: –40

Speed (ns)

Order Part No.

Package

15

IS62LV256L-15TI

450-mil TSOP

IS62LV256L-15JI

300-mil Plastic SOJ

20

IS62LV256L-20TI

450-mil TSOP

IS62LV256L-20JI

300-mil Plastic SOJ

25

IS62LV256L-25TI

450-mil TSOP

IS62LV256L-25JI

300-mil Plastic SOJ

Integrated Silicon Solution, Inc.

2231 Lawson Lane

Santa Clara, CA 95054

Tel: 1-800-379-4774

Fax: (408) 588-0806

E-mail: sales@issi.com

www.issi.com