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September 11, 2000
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800-345-7015 or 408-727-6116
for Tech Support:
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Corrected Typographical Errors
Corrected Vcc and GND nomenclature and Figure 10
Made Preliminary, added PCB layouts and package mechanical diagram
Changed the capacitor values see Analog Component Values on page 22 (C2 and C3) and the pin for C3 on the diagram (page 22). Exchanged
the Tx and Rx filters on PC board layout for ATM user.
Corrected Board layouts and timing specs, added multi-PHY waveforms.
Corrected Fig. 6, added note for utopia speed, corrected Counter Reg. Read Select table to write only, added Input and Output line signal tables.
Added definition for Good Signal bit in the Interrupt Register (address 0x01) and information regarding cable disconnect and link establishment,
component values changed on reference design to accommodate standard values.
Addition of Industrial temperature grade. Additional timing parameters for RESET and UTOPIA bus. Deleted references to 77101. Added specifi-
cation relating AVcc to Vcc. UPLO description improved. Additions to transmit and receive text.
Add statements on standards compliance. Add timing parameters to utility bus read and write cycles (Figures 19 and 20). Correction to reset tim-
ing waveform (Figure 18). Revision to recommended 77105/magnetics interface (Figure 21) and component values. Add list of compatible mag-
netics. Corrections to Figures 7 and 17. Return loss information removed. Eliminate distinction between analog and digital power and ground pins.
51.2 Mbps operation added. TOSC specifications added.
Updated to new format. Removed 51.2 Mbps operation. Remove more references to analog Vcc and ground. Misc. typos corrected.
Removed references to 77V101. Removed section Magnetics Modules for 51 Mbps.
Speed in Mb/s
25Mb/s ATM PHY Transmission
Convergence (TC) and PMD
Commercial (0°C to +70°C)
3445 drw 27
64-Pin STQFP (PP64-1)
see drawing PSC-4046
Industrial (-40°C to +85°C)