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IDT72V7326 Datasheet(PDF) 1 Page - Integrated Device Technology

Part No. IDT72V7326
Description  3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 16,384 X 16,384
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT72V7326 Datasheet(HTML) 1 Page - Integrated Device Technology

 
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1
OCTOBER 2003
IDT72V73260
3.3 VOLT TIME SLOT INTERCHANGE
DIGITAL SWITCH
16,384 X 16,384
 2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice
DSC-5932/9
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The ST-BUS
® is a trademark of Mitel Corp.
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
••••• 16K x 16K non-blocking switching at 32.768Mb/s
••••• 32 serial input and output streams
••••• Accepts single-bit single-data streams at 32.768Mb/s
••••• Per-channel Variable Delay Mode for low-latency applications
••••• Per-channel Constant Delay Mode for frame integrity applications
••••• Automatic identification of ST-BUS® and GCI bus interfaces
••••• Automatic frame offset delay measurement
••••• Per-stream single data frame delay offset programming
••••• Per-channel high-impedance output control
••••• Direct microprocessor access to all internal memories
••••• Memory block programming for quick setup
••••• IEEE-1149.1 (JTAG) Test Port
••••• 3.3V Power Supply
••••• Available in 144-pin (13mm x 13mm) Plastic Ball Grid Array
(PBGA) and 144-pin (20mm x 20mm) Thin Quad Flatpack (TQFP)
••••• Operating Temperature Range -40
°°°°°C to +85°°°°°C
DESCRIPTION:
The IDT72V73260 has a non-blocking switch capacity of 16,384 x 16,384
channels at 32.768Mb/s. With 32 inputs and 32 outputs, programmable per
streamcontrol,andavarietyofoperatingmodestheIDT72V73260isdesigned
for the TDM time slot interchange function in either voice or data applications.
Some of the main features of the IDT72V73260 are LOW power 3.3 Volt
operation, automatic ST-BUS® /GCI sensing, memory block programming,
simplemicroprocessorinterface,JTAGTestAccessPort(TAP)andperstream
programmableinputoffsetdelay,variableorconstantthroughputmodes,output
enable and processor mode.
RX0
RX1
RX31
ODE
F32i
VCC
CS
R/
W
A0-A15
GND
DTA
D0-D15
TX0
TX1
TX15
TX31/OEI15
DS
C32i
FE
RESET
5932 drw01
Receive
Serial Data
Streams
MUX
Data Memory
Internal
Registers
Microprocessor Interface
Timing Unit
Connection
Memory
Transmit
Serial Data
Streams
TX16/OEI0
TX17/OEI1
JTAG Port
TDO
TMS TDI TCK
TRST


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