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IDT70V7339S Datasheet(PDF) 11 Page - Integrated Device Technology |
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IDT70V7339S Datasheet(HTML) 11 Page - Integrated Device Technology |
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11 / 22 page  6.42 IDT70V7339S High-Speed 512K x 18 Synchronous Bank-Switchable Dual-Port Static RAM Industrial and Commercial Temperature Ranges 11 AC Electrical Characteristics Over the Operating Temperature Range (Read and Write Cycle Timing)(2,3) (VDD = 3.3V ± 150mV, TA = 0°C to +70°C) NOTES: 1. The Pipelined output parameters (tCYC2, tCD2) apply to either or both left and right ports when FT/PIPEX = VIH. Flow-through parameters (tCYC1, tCD1) apply when FT/PIPEX = VIL for that port. 2. All input signals are synchronous with respect to the clock except for the asynchronous Output Enable ( OE) and FT/PIPEX. FT/PIPEX should be treated as a DC signal, i.e. steady state during operation. 3. These values are valid for either level of VDDQ (3.3V/2.5V). See page 5 for details on selecting the desired operating voltage levels for each port. 70V7339S200 (5) Com 'l Only 70V7339S166 (3,4) Com 'l & Ind 70V7339S133 (3) Com 'l & Ind Sym bol Param eter Min. Max. Min. Max. Min. Max. Unit tCY C1 Clo ck Cycle Time (Flo w-Thro ug h)(1) 15 ____ 20 ____ 25 ____ ns tCY C2 Clock Cycle Time (P ipelined)(1) 5 ____ 6 ____ 7.5 ____ ns tCH1 Clo ck Hig h Time (Flo w-Thro ug h)(1) 5 ____ 6 ____ 7 ____ ns tCL1 Clo ck Lo w Tim e (Flow-Thro ugh)(1) 5 ____ 6 ____ 7 ____ ns tCH2 Clock High Time (P ipelined)(2) 2.0 ____ 2.1 ____ 2.6 ____ ns tCL2 Clock Lo w Tim e (P ipelined)(1) 2.0 ____ 2.1 ____ 2.6 ____ ns tR Clo ck Rise Time ____ 1.5 ____ 1.5 ____ 1.5 ns tF Clo ck Fall Time ____ 1.5 ____ 1.5 ____ 1.5 ns tSA A d dre ss Se tup Tim e 1.5 ____ 1.7 ____ 1.8 ____ ns tHA Ad dre ss Ho ld Tim e 0.5 ____ 0.5 ____ 0.5 ____ ns tSC Chip E nab le S e tup Time 1.5 ____ 1.7 ____ 1.8 ____ ns tHC Chip E nab le Ho ld Time 0.5 ____ 0.5 ____ 0.5 ____ ns tSW R/W S e tup Time 1.5 ____ 1.7 ____ 1.8 ____ ns tHW R/W Ho ld Time 0.5 ____ 0.5 ____ 0.5 ____ ns tSD Inp ut Data S e tup Time 1.5 ____ 1.7 ____ 1.8 ____ ns tHD Input Data Ho ld Tim e 0.5 ____ 0.5 ____ 0.5 ____ ns tSA D ADS Se tup Time 1.5 ____ 1.7 ____ 1.8 ____ ns tHA D ADS Ho ld Time 0.5 ____ 0.5 ____ 0.5 ____ ns tSCN CNTEN Se tup Time 1.5 ____ 1.7 ____ 1.8 ____ ns tHCN CNTEN Ho ld Time 0.5 ____ 0.5 ____ 0.5 ____ ns tSRPT REPEAT Se tup Time 1.5 ____ 1.7 ____ 1.8 ____ ns tHRP T REPEAT Ho ld Time 0.5 ____ 0.5 ____ 0.5 ____ ns tOE Outp ut Enab le to Data Valid ____ 4.0 ____ 4.0 ____ 4.2 ns tOLZ O utp ut Enab le to O utp ut Lo w-Z 0.5 ____ 0.5 ____ 0.5 ____ ns tOHZ Outp ut Enab le to O utp ut Hig h-Z 1 3.4 1 3.6 1 4.2 ns tCD1 Clo ck to Data Valid (Flo w-Thro ug h)(1) ____ 10 ____ 12 ____ 15 ns tCD2 Clock to Data Valid (Pipelined )(1) ____ 3.4 ____ 3.6 ____ 4.2 ns tDC Data Output Ho ld A fte r Clo ck Hig h 1 ____ 1 ____ 1 ____ ns tCK HZ Clock High to O utp ut High-Z 13.4 13.6 14.2 ns tCKLZ Clo ck Hig h to O utp ut Lo w-Z 0.5 ____ 0.5 ____ 0.5 ____ ns Port-to-Port Delay tCO Clo ck-to -Clo ck O ffse t 5.0 ____ 6.0 ____ 7.5 ____ ns 5628 tb l 11 4. 166MHz Industrial Temperature not available in BF-208 package. 5. This speed grade available when VDDQ = 3.3.V for a specific port (i.e., OPTx = VIH). This speed grade available in BC-256 package only. |
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