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SLG46824 Datasheet(PDF) 18 Page - Dialog Semiconductor

Part No. SLG46824
Description  GreenPAK Programmable Mixed Signal Matrix with In System
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Maker  DIALOG [Dialog Semiconductor]
Homepage  http://www.dialog-semiconductor.com/
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SLG46824 Datasheet(HTML) 18 Page - Dialog Semiconductor

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Datasheet
31-Jan-2018
CFR0011-120-01
Revision 2.3
18 of 152
© 2018 Dialog Semiconductor
SLG46824
GreenPAK Programmable Mixed Signal Matrix with In System
Programmability
PRELIMINARY
Table 8: Programmable Delay Expected Delays and Widths (Typical)
Symbol
Parameter
Note
VDD = 2.5 V VDD = 3.3V VDD = 5.0V
Unit
time1
Width, 1 cell
mode: (any) edge detect, edge detect output
325150
110
ns
time1
Width, 2 cell
mode: (any) edge detect, edge detect output
740
300
225
ns
time1
Width, 3 cell
mode: (any) edge detect, edge detect output
1020
450
340
ns
time1
Width, 4 cell
mode: (any) edge detect, edge detect output
1350
600
450
ns
time2
Delay, 1 cell
mode: (any) edge detect, edge detect output
44
18
14
ns
time2
Delay, 2 cell
mode: (any) edge detect, edge detect output
44
18
14
ns
time2
Delay, 3 cell
mode: (any) edge detect, edge detect output
44
18
14
ns
time2
Delay, 4 cell
mode: (any) edge detect, edge detect output
44
18
14
ns
time1
Width, 1 cell
mode: delayed (any) edge detect, delayed
edge detect output
340
150
110
ns
time1
Width, 2 cell
mode: delayed (any) edge detect, delayed
edge detect output
670
300
220
ns
time1
Width, 3 cell
mode: delayed (any) edge detect, delayed
edge detect output
1000
450
335
ns
time1
Width, 4 cell
mode: delayed (any) edge detect, delayed
edge detect output
1340
600
450
ns
time2
Delay, 1 cell
mode: delayed (any) edge detect, delayed
edge detect output
570
220
140
ns
time2
Delay, 2 cell
mode: delayed (any) edge detect, delayed
edge detect output
570
220
140
ns
time2
Delay, 3 cell
mode: delayed (any) edge detect, delayed
edge detect output
570
220
140
ns
time2
Delay, 4 cell
mode: delayed (any) edge detect, delayed
edge detect output
570
220
140
ns
time2
Delay, 1 cell
mode: both edge delay, edge detect output
382
375
126
ns
time2
Delay, 2 cell
mode: both edge delay, edge detect output
713
169
237
ns
time2
Delay, 3 cell
mode: both edge delay, edge detect output
1045
318
350
ns
time2
Delay, 4 cell
mode: both edge delay, edge detect output
1370
466
460
ns
time2
Delay, 1 cell
mode: both edge delay, delayed edge detect
output
900
613
250
ns
time2
Delay, 2 cell
mode: both edge delay, delayed edge detect
output
1250
520
360
ns
time2
Delay, 3 cell
mode: both edge delay, delayed edge detect
output
1600
680
480
ns
time2
Delay, 4 cell
mode: both edge delay, delayed edge detect
output
1900
815
600
ns
Table 9: Typical Filter Rejection Pulse Width at T=25°C
Parameter
VDD = 2.5 V VDD = 3.3V VDD = 5.0V
Unit
Filtered Pulse Width
< 123
< 84
< 52
ns
Table 10: Typical Counter/Delay Offset Measurements
Parameter
OSC Freq
OSC Power
VDD = 2.5 V VDD = 3.3V VDD = 5.0V
Unit
Power ON time
25 MHz
auto
0.13
0.13
0.13
s


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