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SLG46824 Datasheet(PDF) 99 Page - Dialog Semiconductor

Part No. SLG46824
Description  GreenPAK Programmable Mixed Signal Matrix with In System
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Maker  DIALOG [Dialog Semiconductor]
Homepage  http://www.dialog-semiconductor.com/
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SLG46824 Datasheet(HTML) 99 Page - Dialog Semiconductor

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Datasheet
31-Jan-2018
CFR0011-120-01
Revision 2.3
99 of 152
© 2018 Dialog Semiconductor
SLG46824
GreenPAK Programmable Mixed Signal Matrix with In System
Programmability
PRELIMINARY
Upon receipt of the proper Device Address and Erase Register Address, the SLG46824 will send an ACK. The device will then
be ready to receive Erase Register data. The SLG46824 will respond with an ACK after Erase Register data word is received.
The addressing device, such as a bus Master, must then terminate the write operation with a Stop condition. At that time the
GPAK will enter an internally self-timed erase cycle, which will be completed within tER (max 20 ms). While the data is being
written into the Memory Array, all inputs, outputs, internal logic and I2C access to the Register data will be operational/valid.
After the erase has taken place, the contents of ERSE bits will be set to “0” automatically. Erase will be triggered by Stop Bit in
I2C command.
.
Table 53: Erase Register Bit Function Description
Bit
Name
Type
Description
7ERSE
Erase
Enable
W
Setting b7 bit to “1” will cause the page erase.
6--
--
--
--
5--
--
--
--
4
ERSEB4
Page
Selection
for Erase
W
3
ERSEB3
W
2
ERSEB2
W
1
ERSEB1
W
0
ERSEB0
W


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