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SLG46824 Datasheet(PDF) 98 Page - Dialog Semiconductor

Part No. SLG46824
Description  GreenPAK Programmable Mixed Signal Matrix with In System
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Maker  DIALOG [Dialog Semiconductor]
Homepage  http://www.dialog-semiconductor.com/
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SLG46824 Datasheet(HTML) 98 Page - Dialog Semiconductor

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Datasheet
31-Jan-2018
CFR0011-120-01
Revision 2.3
98 of 152
© 2018 Dialog Semiconductor
SLG46824
GreenPAK Programmable Mixed Signal Matrix with In System
Programmability
PRELIMINARY
16.2 SERIAL NVM READ OPERATIONS
There are three read operations:
Current Address Read
Random Address Read
Sequential Read
Please refer to the Section 15 for more details.
16.3 SERIAL NVM ERASE OPERATIONS
The erase scheme allows a portion or the 2K bits NVM chip configuration to be erased by modifying the contents of the Erase
Register (ERSR). Changing the state of the ERSR is accomplished with a Byte Write sequence with the requirements outlined in
this section.
The ERSR register is located on E3H address.
The ERSR format is shown in Table 52, and the ERSR bit functions are included in Table 53.
Figure 70: Memory Map
Table 52: Erase Register Bit format
b7
b6
b5
b4
b3
b2
b1
b0
Page Erase
Register
ERSE
--
--
ERSEB4
ERSEB3
ERSEB2
ERSEB1
ERSEB0
2 Kbits Register Data Configuration
Not Used
2 Kbits NVM Data Configuration
Reserved
Not Used
I2C Block Address
Memory Space
A10 = 0
A10 = 0
A10 = 0
A10 = 0
A10 = 1
A9 = 0
A9 = 0
A9 = 1
A9 = 1
A9 = X
A8 = 0
A8 = 1
A8 = 0
A8 = 1
A8 = X
Lowest I2C
Address = 000h
Highest I2C
Address = 7FFh


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