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SLG46824 Datasheet(PDF) 92 Page - Dialog Semiconductor

Part No. SLG46824
Description  GreenPAK Programmable Mixed Signal Matrix with In System
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Maker  DIALOG [Dialog Semiconductor]
Homepage  http://www.dialog-semiconductor.com/
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SLG46824 Datasheet(HTML) 92 Page - Dialog Semiconductor

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Datasheet
31-Jan-2018
CFR0011-120-01
Revision 2.3
92 of 152
© 2018 Dialog Semiconductor
SLG46824
GreenPAK Programmable Mixed Signal Matrix with In System
Programmability
PRELIMINARY
counter in preparation for the second half of the command. After the Start bit, the Bus Master issues a second control byte with
the R/W bit set to “1”, after which the SLG46824 issues an Acknowledge bit, followed by the requested eight data bits.
15.4.5 Sequential Read Command
The Sequential Read command is initiated in the same way as a Random Read command, except that once the SLG46824
transmits the first data byte, the Bus Master issues an Acknowledge bit as opposed to a Stop condition in a random read. The
Bus Master can continue reading sequential bytes of data, and will terminate the command with a Stop condition.
15.5 CHIP CONFIGURATION DATA PROTECTION
The SLG46824 utilizes a scheme that allows a portion or the entire Register and NVM to be inhibited from being read or written/
erased. There are two bytes that define the register and NVM access or change. The first byte RPR defines the 2k register read
and write protection. The second byte NPR defines the 2k NVM data configuration read and write protection. If desired, the
protection lock bit (PRL) can be set so that protection may no longer be modified, thereby making the current protection scheme
permanent. The status of the RPR and NPR can be determined by following a Random Read sequence. Changing the state of
the RPR and NPR is accomplished with a Byte Write sequence with the requirements outlined in this section.
The RPR register is located on H’E0 address, while NPR is located on H’E1 address.
The RPR format is shown in Table 47, and the RPR bit functions are included in Table 48.
Figure 65: Random Read Command
Figure 66: Sequential Read Command
Table 47: RPR Format
b7
b6
b5
b4
b3
b2
b1
b0
RPR
RPRB3
RPRB2
RPRB1
RPRB0
X X X X
A
10
A
9
A
8 W
Control Byte
Word Address (n)
Control
Code
Block
Address
Write bit
S
ACK
Acknowledge
bit
Start
bit
Control Byte
Stop
bit
SDA LINE
Bus Activity
ACK
Data (n)
ACK
P
XXXX
A
10
A
9
A
8 R
S
Read bit
No Ack
bit
Block
Address
Control
Code
X X X X
A
10
A
9
A
8 R
Control Byte
Data (n)
Control
Code
Block
Address
Read bit
S
ACK
Acknowledge
bit
Start
bit
Data (n+1)
Stop
bit
SDA LINE
Bus Activity
ACK
Data (n + 2)
ACK
ACK
Data (n + x)
P
No Ack
bit


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