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SLG46824 Datasheet(PDF) 90 Page - Dialog Semiconductor

Part No. SLG46824
Description  GreenPAK Programmable Mixed Signal Matrix with In System
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Maker  DIALOG [Dialog Semiconductor]
Homepage  http://www.dialog-semiconductor.com/
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SLG46824 Datasheet(HTML) 90 Page - Dialog Semiconductor

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Datasheet
31-Jan-2018
CFR0011-120-01
Revision 2.3
90 of 152
© 2018 Dialog Semiconductor
SLG46824
GreenPAK Programmable Mixed Signal Matrix with In System
Programmability
PRELIMINARY
15.3 I2C SERIAL GENERAL TIMING
General timing characteristics for the I2C Serial Communications macrocell are shown in Figure 61. Timing specifications can be
found in the Section 3.3.
15.4 I2C SERIAL COMMUNICATIONS COMMANDS
15.4.1 Byte Write Command
Following the Start condition from the Master, the Control Code [4 bits], the Block Address [3 bits] and the R/W bit (set to “0”), are
placed onto the I2C bus by the Master. After the SLG46824 sends an Acknowledge bit (ACK), the next byte transmitted by the
Master is the Word Address. The Block Address (A10, A9, A8), combined with the Word Address (A7 through A0), together set
the internal address pointer in the SLG46824 where the data byte is to be written. After the SLG46824 sends another Acknowledge
bit, the Master will transmit the data byte to be written into the addressed memory location. The SLG46824 again provides an
Acknowledge bit and then the Master generates a Stop condition. The internal write cycle for the data will take place at the time
that the SLG46824 generates the Acknowledge bit.
It is possible to latch all IOs during I2C write command to the register configuration data (block address A10A9A8 = 000),
reg<1602>=1 - Enable. It means that IOs will remain their state until the write command is done.
Figure 61: I2C General Timing Characteristics
Figure 62: Byte Write Command, R/W = 0
SCL
tF
tR
tSU STO
tBUF
tHIGH
tLOW
tSU DAT
tHD DAT
tHD STA
tSU STA
tAA
tDH
SDA IN
SDA OUT
X
X
X
X
A
10
A
9
A
8
W
A
7
A
0
Control Byte
Word Address
Control
Code
Block
Address
R/W bit = 0
S
ACK
Acknowledge
bit
Start
bit
ACK D
7
D
0
Data
P
Stop
bit
Acknowledge
bit
SDA LINE
Bus Activity
Acknowledge
bit
ACK


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