 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
G751-1P1 Datasheet(PDF) 6 Page - Global Mixed-mode Technology Inc |
|
||||||||||||||||||||||||||||||
G751-1P1 Datasheet(HTML) 6 Page - Global Mixed-mode Technology Inc |
|
|
6 / 11 page 
Ver: 2.4 Nov 26, 2002 TEL: 886-3-5788833 http://www.gmt.com.tw 6 G751 Global Mixed-mode Technology Inc. Internal Register Structure There are four data registers in the G751, selected by the Pointer register. At power-up the Pointer is set to “00”; the location for the Temperature Register. The Pointer register latches whatever the last loca- tion it was set to. In Interrupt Mode, a read from the G751, or placing the device in shutdown mode, re- sets the O.S. output. All registers are read and write, except the Temperature register which is read only. A write to the G751 will always include the address byte and the Pointer byte. A write to the Configura- tion register requires one data byte, and the TOS and THYST registers require two data bytes. Reading the G751 can take place either of two ways: If the location latched in the Pointer is correct (most of the time it is expected that the Pointer will point to Temperature register because it will be the data most frequently read from the G751), then the read can simply consist of an address byte, followed by retrieving the corresponding number of data bytes. If the Pointer needs to be set, than an address byte, pointer byte, repeat start, and another address byte will accomplish a read. The first data byte is the most significant byte with most signification bit first, permitting only as much data as necessary to be read to determine tempera- ture condition. For instance, if the first four bits of the temperature data indicates an overtemperature con- dition, the host processor could immediately take action to remedy the excessive temperatures. At the end of a read, the G751 can accept either Acknowl- edge or No Acknowledge from the Master (No Ac- knowledge is typically used as a signal for the salve that the Master has read its last byte). An inadvertent 8-bit read from a 16-bit register, with the D7 bit low, can cause the G751 to stop in a state where the SDA line is held low as shown in Figure 2. This can prevent any further bus communication until at least 9 additional clock cycles have occurred. Al- ternatively, the master can issue clock cycles until SDA goes high, at which time issuing a “Stop” condi- tion will reset the G751. Figure 2. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero Interface Pointer Register (Selects register for communication Temperature (Read-only) Pointer = 00000000 TOS Set Point (Read-write) Pointer = 00000011 Configuration (Read-write, sets operating Mode) Pointer = 00000001 THYST Set Point (Read-write) Pointer = 00000010 Register Select Address Data SMBDATA SMBCLK Interface Pointer Register (Selects register for communication Temperature (Read-only) Pointer = 00000000 TOS Set Point (Read-write) Pointer = 00000011 Configuration (Read-write, sets operating Mode) Pointer = 00000001 THYST Set Point (Read-write) Pointer = 00000010 Register Select Address Data SMBDATA SMBCLK A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D6 D5 D4 D3 D2 D1 D0 SMBCLK SMBDATA Start by Master Address Byte R/W Bit Ack by G751 Most Significant Data Byter Ack by Master D7 Intended Stop by Master but G751 locks SMBDATA low Master detects the error of its ways Ack by Master Stop Cond by Master A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D6 D5 D4 D3 D2 D1 D0 SMBCLK SMBDATA Start by Master Address Byte R/W Bit Ack by G751 Most Significant Data Byter Ack by Master D7 Intended Stop by Master but G751 locks SMBDATA low Master detects the error of its ways Ack by Master Stop Cond by Master |
English ▼
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
