000-0059M308-101

Page 5 of 11

SLG59M308V

SLG59M308V Turn ON

The normal power on sequence is first VDD, with VD only being applied after VDD is > 1 V, and then ON after VD is at least 90%

of final value. The normal power off sequence is the power on sequence in reverse.

If VDD and VD are turned on at the same time then it is possible that a voltage glitch will appear on VS before VDD achieves 1V

which is the VT of the main MOSFET. The size of the glitch is dependent on source and drain capacitance loading and the ramp

rate of VDD & VD.

SLG59M308V Turn ON

The VS ramp follows a linear path, not an RC limitation provided the ramp is slow enough to not be current limited by load

capacitance.

SLG59M308V Current Limiting

The SLG59M308V has two forms of current limiting.

Standard Current Limiting Mode

Current is measured by mirroring the current through the main MOSFET. The mirrored current is then sent through a resistor

creating a voltage V(i) proportional to the MOSFET current. The V(i) is then compared with a Band Gap voltage V(BG). If V(i)

exceeds the Band Gap voltage then the voltage V(g) on the gate of the main MOSFET is reduced. The V(g) continues to drop

until V(i) < V(BG). This response is a closed loop response and is therefore very fast and current limits in less than a few

micro-seconds. There is no difference between peak or constant current limit.

Temperature Cutoff

However, as the V(g) drops the Rds(ON) of the main MOSFET will increase, thus limiting the current, but also increasing the

power dissipation of the IC. The IC is very small and cannot dissipate much power. Therefore, if a current limit condition is

sustained the IC will heat up. If the temperature exceeds approximately 120°C, then V(g) will be brought low completely shutting

off the main MOSFET. As the die cools the MOSFET will be turned back on at 100°C.

If the current limiting condition has not been mitigated then the die will again heat up to 120°C and the process will repeat.

Short Circuit Current Limiting Mode

When V(S) < 250 mV, which is the case if there is a solder bridge during the manufacturing process or a hard short on the power

rail, then the current is limited to approximately 500 mA. This current limit is accomplished in the same manner as the Standard

Current Limiting Mode with the exception that the current mirror is 15x greater. Because the current mirror is so much larger, a

15x smaller main MOSFET current is required to generate the same V(i). If V(S) rises above approximately 250 mV, then this

mode is automatically switched out.