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DAC6573 as a Slave Receiver - High-Speed Mode

HS-Master Code

R/W

A Ctrl-Byte

A MS-Byte A

LS-Byte

A/A

P

0 (write)

Data Transferred

(n* Words + Acknowledge)

Word = 16 Bit

S

A Sr Slave Address

HS-Mode Continues

F/S-Mode

HS-Mode

F/S-Mode

Sr Slave Address

0

0

0

0

1

X

X

R/W

MSB

LSB

HS-Mode Master Code:

A3

A2

L1

L0

X

Sel1 Sel2 PD0

MSB

LSB

Control Byte:

A3

= Extended Address Bit

A2

= Extended Address Bit

L1

= Load1 (Mode Select) Bit

L0

= Load0 (Mode Select) Bit

Sel1 = Buff Sel1 (Channel) Select Bit

Sel0 = Buff Sel0 (Channel) Select Bit

PD0 = Power Down Flag

D9

D8

D7

D6

D5

D4

D3

D2

MSB

LSB

MS-Byte:

D1

D0

X

X

X

X

X

X

MSB

LSB

LS-Byte:

D9 − D0 = Data Bits

X = Don’t Care

DAC6573

SLAS402 – NOVEMBER 2003

Figure 34 shows the high-speed mode master transmitter addressing a DAC6573 Slave Receiver with a 7-bit

address.

Figure 34. High-Speed Mode: Slave Receiver

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