512K x 8 Static RAM
CY62148B MoBL™
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-05039 Rev. *B
October 8, 2001
Features
• 4.5V–5.5V operation
• Low active power
— Typical active current: 2.5 mA @ f = 1 MHz
— Typical active current: 12.5 mA @ f = fmax
• Low standby current
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• CMOS for optimum speed/power
Functional Description
The CY62148B is a high-performance CMOS static RAM or-
ganized as 512K words by 8 bits. Easy memory expansion is
provided by an active LOW Chip Enable (CE), an active LOW
Output Enable (OE), and three-state drivers. This device has
an automatic power-down feature that reduces power con-
sumption by more than 99% when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O0 through I/O7) is then written into the location speci-
fied on the address pins (A0 through A18).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH for read. Under these conditions, the con-
tents of the memory location specified by the address pins will
appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY62148B is available in a standard 32-pin 450-mil-wide
body width SOIC, 32-pin TSOP II, and 32-pin Reverse TSOP
II packages.
Logic Block Diagram
Pin Configuration
A1
A4
A5
A6
A7
A12
A14
A16
COLUMN
DECODER
INPUT BUFFER
POWER
DOWN
WE
OE
I/O0
I/O1
I/O2
I/O3
512 x 256 x 8
ARRAY
I/O7
I/O6
I/O5
I/O4
A0
CE
A17
1
2
3
4
5
6
7
8
9
10
11
14
19
20
24
23
22
21
25
28
27
26
12
13
29
32
31
30
16
15
17
18
A16
A14
A12
A7
A6
A5
A4
A3
WE
V
CC
A15
A13
A8
A
9
I/O7
I/O
6
I/O5
I/O4
A2
I/O0
I/O1
I/O2
CE
OE
A10
I/O
A1
A0
A11
A18
16
15
14
13
12
11
10
9
8
7
6
3
30
29
25
26
27
28
24
21
22
23
5
4
20
17
18
19
1
2
32
31
A17
I/O2
I/O1
I/O0
A0
A1
A2
A3
A4
A13
A18
A15
A5
A12
A14
A16
A8
A9
Vcc
A6
A7
TSOP II
Top View
SOIC
TSOP II
Top View
Reverse
GND
GND
I/O3
I/O3
I/O6
I/O5
I/O4
I/O7
CE
OE
A10
A11
A17
WE
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