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DAC70508ZYZFT Datasheet(PDF) 4 Page - Texas Instruments |
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DAC70508ZYZFT Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 53 page  1 2 3 4 A B C D Not to scale OUT3 GND VDD OUT4 OUT1 OUT2 OUT6 OUT5 REF OUT0 OUT7 CS VIO SDO/ALARM SDI SCLK 1 REF 12 CS 2 OUT0 11 OUT7 3 OUT1 10 OUT6 4 OUT2 9 OUT5 Not to scale Thermal Pad 4 DAC80508Z, DAC70508Z, DAC60508Z, DAC80508M, DAC70508M, DAC60508M SLASEL1B – JUNE 2017 – REVISED JANUARY 2018 www.ti.com Product Folder Links: DAC80508Z DAC70508Z DAC60508Z DAC80508M DAC70508M DAC60508M Submit Documentation Feedback Copyright © 2017–2018, Texas Instruments Incorporated 6 Pin Configuration and Functions RTE Package 16-Pin WQFN Top View YZF Package 16-Pin DSBGA Top View Pin Functions PIN TYPE DESCRIPTION NAME WQFN NO. DSBGA NO. REF 1 C1 I/O When using internal reference, this is the reference output voltage pin (default). When using an external reference, this is the reference input pin to the device. OUT0 2 C2 O Analog output voltage from DAC 0. OUT1 3 B1 O Analog output voltage from DAC 1. OUT2 4 B2 O Analog output voltage from DAC 2. OUT3 5 A1 O Analog output voltage from DAC 3. GND 6 A2 GND Ground reference point for all circuitry on the device. VDD 7 A3 PWR Analog supply voltage (2.7 V to 5.5 V). OUT4 8 A4 O Analog output voltage from DAC 4. OUT5 9 B4 O Analog output voltage from DAC 5. OUT6 10 B3 O Analog output voltage from DAC 6. OUT7 11 C3 O Analog output voltage from DAC 7. CS 12 C4 I Active low serial data enable. This input is the frame synchronization signal for the serial data. When the signal goes low, it enables the serial interface input shift register. SCLK 13 D4 I Serial interface clock. SDI 14 D3 I Serial interface data input. Data are clocked into the input shift register on each falling edge of the SCLK pin. SDO/ALARM 15 D2 O Serial interface data output (default). The SDO pin is in high impedance when CS pin is high. Data are clocked out of the input shift register on either rising or falling edges of the SCLK pin as specified by the FSDO bit. Alternatively the pin can be configured as an ALARM open-drain output to indicate a CRC or reference alarm event. If configured as ALARM a 10 kΩ, pull-up resistor to VIO is required. VIO 16 D1 PWR IO supply voltage (1.7 V to 5.5 V). This pin sets the I/O operating voltage for the serial interface. Thermal Pad – – – The thermal pad is located on the bottom-side of the WQFN package. The thermal pad should be connected to any internal PCB ground plane using multiple vias for good thermal performance. |
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