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DRA74P Datasheet(PDF) 4 Page - Texas Instruments |
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DRA74P Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 481 page  4 DRA75P, DRA74P SPRS989D – DECEMBER 2016 – REVISED DECEMBER 2017 www.ti.com Submit Documentation Feedback Product Folder Links: DRA75P DRA74P Table of Contents Copyright © 2016–2017, Texas Instruments Incorporated Table of Contents 1 Device Overview ......................................... 1 1.1 Features .............................................. 1 1.2 Applications ........................................... 2 1.3 Description ............................................ 2 1.4 Functional Block Diagram ........................... 3 2 Revision History ......................................... 5 3 Device Comparison ..................................... 6 3.1 Device Comparison Table ............................ 6 3.2 Related Products ..................................... 9 4 Terminal Configuration and Functions ............ 10 4.1 Pin Diagram ......................................... 10 4.2 Pin Attributes ........................................ 10 4.3 Signal Descriptions .................................. 81 4.4 Pin Multiplexing .................................... 122 4.5 Connections for Unused Pins ...................... 138 5 Specifications ......................................... 139 5.1 Absolute Maximum Ratings ........................ 140 5.2 ESD Ratings ....................................... 140 5.3 Power-On Hours (POH) ........................... 141 5.4 Recommended Operating Conditions ............. 142 5.5 Operating Performance Points ..................... 145 5.6 Power Consumption Summary .................... 167 5.7 Electrical Characteristics ........................... 167 5.8 VPP Specifications for One-Time Programmable (OTP) eFuses ...................................... 175 5.9 Thermal Resistance Characteristics ............... 176 5.10 Timing Requirements and Switching Characteristics ..................................... 178 6 Detailed Description .................................. 346 6.1 Description ......................................... 346 6.2 Functional Block Diagram ......................... 346 6.3 MPU ................................................ 348 6.4 DSP Subsystem ................................... 351 6.5 ISS ................................................. 355 6.6 IVA ................................................. 355 6.7 EVE ................................................ 356 6.8 IPU ................................................. 357 6.9 VPE ................................................ 358 6.10 GPU ................................................ 360 6.11 ATL Overview ...................................... 360 6.12 Memory Subsystem ................................ 362 6.13 Interprocessor Communication .................... 365 6.14 Interrupt Controller ................................. 366 6.15 EDMA .............................................. 367 6.16 Peripherals ......................................... 368 6.17 On-Chip Debug .................................... 384 7 Applications, Implementation, and Layout ...... 387 7.1 Introduction ........................................ 387 7.2 Power Optimizations ............................... 388 7.3 Core Power Domains .............................. 402 7.4 Single-Ended Interfaces ........................... 414 7.5 Differential Interfaces .............................. 416 7.6 Clock Routing Guidelines .......................... 437 7.7 DDR2/DDR3 Board Design and Layout Guidelines .......................................... 439 8 Device and Documentation Support .............. 474 8.1 Device Nomenclature .............................. 474 8.2 Tools and Software ................................ 476 8.3 Documentation Support ............................ 476 8.4 Receiving Notification of Documentation Updates . 477 8.5 Related Links ...................................... 477 8.6 Community Resources ............................. 477 8.7 Trademarks ........................................ 478 8.8 Electrostatic Discharge Caution ................... 478 8.9 Export Control Notice .............................. 478 8.10 Glossary ............................................ 478 9 Mechanical Packaging and Orderable Information ............................................. 479 9.1 Mechanical Data ................................... 479 |
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