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CDCM6208V2RGZT Datasheet(PDF) 4 Page - Texas Instruments

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Part # CDCM6208V2RGZT
Description  2:8 Clock Generator, Jitter Cleaner With Fractional Dividers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCM6208V2RGZT Datasheet(HTML) 4 Page - Texas Instruments

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Y7_N
Y7_P
VDD_Y7
Y6_N
Y6_P
VDD_Y6
VDD_Y5
36
35
34
33
28
27
26
29
25
30
31
32
SDI/SDA/PIN1
SDO/AD0/PIN2
SCS/AD1/PIN3
REF_SEL
SCL/PIN4
1
2
3
4
5
6
7
8
9
10
11
12
Y5_P
PRI_REFN
PRI_REFP
SI_MODE0
Y4_N
SEC_REFP
SEC_REFN
Y4_P
VDD_Y4
Y5_N
DVDD
VDD
VDD_Y2_Y3
VDD_PRI_REF
VDD_SEC_REF
_Y0_Y1
4
CDCM6208
SCAS931G – MAY 2012 – REVISED JANUARY 2018
www.ti.com
Product Folder Links: CDCM6208
Submit Documentation Feedback
Copyright © 2012–2018, Texas Instruments Incorporated
(1)
If Secondary input buffer is disabled (Register 4 Bit 5 = 0), it is possible to connect VDD_SEC_REF to GND.
5 Pin Configuration and Functions
RGZ Package
48-Pin VQFN
(Top View)
Pin Functions
PIN
I/O
TYPE
DESCRIPTION
NAME
NO.
PRI_REFP
8
Input
Universal
Primary Reference Input +
PRI_REFN
9
Input
Universal
Primary Reference Input –
VDD_PRI_REF
7
PWR
Analog
Supply pin for reference inputs to set between 1.8 V, 2.5 V, or 3.3 V,
or connected to VDD_SEC_REF.
SEC_REFP
11
Input
Universal
Secondary Reference Input +
SEC_REFN
12
Input
Universal
Secondary Reference Input –
VDD_SEC_REF
10
PWR
Analog
Supply pin for reference inputs to set between 1.8 V, 2.5 V, or 3.3 V,
or connected to VDD_PRI_REF(1).
REF_SEL
6
Input
LVCMOS
with 50-kΩ pullup
Manual Reference Selection MUX for PLL. In SPI or I2C mode the
reference selection is also controlled through Register 4 bit
12.REF_SEL = 0 (
≤ VIL): selects PRI_REFREF_SEL = 1 (≥ VIH):
selects SEC_REF (when Reg 4.12 = 1). See Table 5 for detail.
ELF
41
Output
Analog
External loop filter pin for PLL
Y0_P
14
Output
Universal
Output 0 Positive Pin
Y0_N
15
Output
Universal
Output 0 Negative Pin
Y1_P
17
Output
Universal
Output 1 Positive Pin
Y1_N
16
Output
Universal
Output 1 Negative Pin


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