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CDCM6208V1RGZR Datasheet(PDF) 67 Page - Texas Instruments |
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CDCM6208V1RGZR Datasheet(HTML) 67 Page - Texas Instruments |
67 / 92 page 67 CDCM6208 www.ti.com SCAS931G – MAY 2012 – REVISED JANUARY 2018 Product Folder Links: CDCM6208 Submit Documentation Feedback Copyright © 2012–2018, Texas Instruments Incorporated Typical Applications (continued) (1) Input signal: 250-fs RMS (Integration Range 12 kHz to 5 MHz) Table 41 shows the maximum total jitter over PVT with and without a low-pass filter. Table 41. Maximum Total Jitter(1) Over PVT With and Without Low-Pass Filter OUTPUT FREQUENCY [MHz] MAX TJ [ps] DSP SPEC MAX TJ [ps] WITHOUT LOW-PASS FILTER MAX TJ [ps] WITH 13-MHZ LOW-PASS FILTER Y0 122.88 56 9.43 8.19 Y2 30.72 56 9.60 7.36 Y3 30.72 56 9.47 7.42 Y4 156.25 (6 bit fraction) 56 57.66 17.48 Y5 156.25 (20 bit fraction) 56 76.87 32.32 Y6 100.00 56 86.30 33.86 Y7 66.667 300 81.71 35.77 Figure 51 shows the maximum Total Jitter with and without low-pass filter characteristic and the maximum TI KeyStone™ I specification. Figure 51. Maximum Jitter Over PVT NOTE Due to the damping characteristic of the DSP SERDES PLLs, the actual TJ data can be worse. |
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