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ADN2811 Datasheet(PDF) 2 Page - Analog Devices

Part No. ADN2811
Description  OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADN2811 Datasheet(HTML) 2 Page - Analog Devices

 
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REV. A
–2–
ADN2811–SPECIFICATIONS
(TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 4.7 F, SLICEP = SLICEN = VCC,
unless otherwise noted.)
Parameter
Conditions
Min
Typ
Max
Unit
QUANTIZER–DC CHARACTERISTICS
Input Voltage Range
@ PIN or NIN, DC-Coupled
0
1.2
V
Peak-to-Peak Differential Input
2.4
V
Input Common-Mode Level
DC-Coupled. (See Figure 22)
0.4
V
Differential Input Sensitivity
PIN–NIN, AC-Coupled
1, BER = 1
10
–10
410
mV p-p
Input Overdrive
Figure 4
2
5
mV p-p
Input Offset
500
µV
Input rms Noise
BER = 1
10
–10
244
µV rms
QUANTIZER–AC CHARACTERISTICS
Upper –3 dB Bandwidth
1.9
GHz
Small Signal Gain
Differential
54
dB
S11
@ 2.5 GHz
–15
dB
Input Resistance
Differential
100
Input Capacitance
0.65
pF
Pulsewidth Distortion2
10
ps
QUANTIZER SLICE ADJUSTMENT
Gain
SliceP–SliceN =
0.5 V
0.115
0.200
0.300
V/V
Control Voltage Range
SliceP–SliceN
–0.8
+0.8
V
Control Voltage Range
@ SliceP or SliceN
1.3
VCC
V
Slice Threshold Offset
±1.0
mV
LEVEL SIGNAL DETECT (SDOUT)
Level Detect Range (See Figure 2)
RTHRESH = 2 k
9.4
13.3
18.0
mV
RTHRESH = 20 k
2.5
5.3
7.6
mV
RTHRESH = 90 k
0.7
3.0
5.2
mV
Response TimeDC-Coupled
0.1
0.3
5
µs
Hysteresis (Electrical), PRBS 2
23
RTHRESH = 2 k
5.6
6.6
7.8
dB
RTHRESH = 20 k
3.9
6.1
8.5
dB
RTHRESH = 90 k
3.2
6.7
9.9
dB
LOSS OF LOCK DETECT (LOL)
LOL Response Time
From fVCO error > 1000 ppm
60
µs
POWER SUPPLY VOLTAGE
3.0
3.3
3.6
V
POWER SUPPLY CURRENT
150
164
215
mA
PHASE-LOCKED LOOP
CHARACTERISTICS
PIN–NIN = 10 mV p-p
Jitter Transfer BW
OC-48
590
880
kHz
Jitter Peaking
OC-48
0.025
dB
Jitter Generation
OC-48, 12 kHz–20 MHz
0.0033
UI rms
0.05
0.09
UI p-p
Jitter Tolerance
OC-48 (See Figure 9)
600 Hz
923
UI p-p
6 kHz
20
3
UI p-p
100 kHz
5.5
UI p-p
1 MHz
1.03
UI p-p


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