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ADC12DJ2700 Datasheet(PDF) 88 Page - Texas Instruments

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Part No. ADC12DJ2700
Description  5.4-GSPS Single-Channel or 2.7-GSPS Dual-Channel, 12-Bit, RF-Sampling Analog-to-Digital Converter (ADC)
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DJ2700 Datasheet(HTML) 88 Page - Texas Instruments

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ADC12DJ2700
SLVSEH9 – JANUARY 2018
www.ti.com
Product Folder Links: ADC12DJ2700
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Copyright © 2018, Texas Instruments Incorporated
7.6.1.3.5
INB Full-Scale Range Adjust Register (address = 0x032-0x033) [reset = 0xA000]
Figure 99. INB Full Scale Range Adjust Register (FS_RANGE_B)
15
14
13
12
11
10
9
8
FS_RANGE_B[15:8]
R/W-0xA0
7
6
5
4
3
2
1
0
FS_RANGE_B[7:0]
R/W-0x00
Table 59. FS_RANGE_B Field Descriptions
Bit
Field
Type
Reset
Description
15-0
FS_RANGE_B
R/W
0xA000h
This field enables adjustment of the analog full-scale range for
INB.
0x0000: Settings below 0x2000 may result in degraded device
performance
0x2000: 500 mVPP - Recommended minimum setting
0xA000: 800 mVPP (default)
0xFFFF: 1000 mVPP
7.6.1.3.6
Internal Reference Bypass Register (address = 0x038) [reset = 0x00]
Figure 100. Internal Reference Bypass Register (BG_BYPASS)
7
6
5
4
3
2
1
0
RESERVED
BG_BYPASS
R/W-0000 000
R/W-0
Table 60. BG_BYPASS Field Descriptions
Bit
Field
Type
Reset
Description
7-1
RESERVED
R/W
0000 000
RESERVED
0
BG_BYPASS
R/W
0
When set, VA11 is used as the voltage reference instead of the
internal reference.
7.6.1.3.7
TMSTP± Control Register (address = 0x03B) [reset = 0x00]
Figure 101. TMSTP± Control Register (TMSTP_CTRL)
7
6
5
4
3
2
1
0
RESERVED
TMSTP_LVPECL_EN
TMSTP_RECV_EN
R/W-0000 00
R/W-0
R/W-0
Table 61. TMSTP_CTRL Field Descriptions
Bit
Field
Type
Reset
Description
7-2
RESERVED
R/W
0000 00
RESERVED
1
TMSTP_LVPECL_EN
R/W
0
When set, this bit activates the low-voltage PECL mode for the
differential TMSTP± input.
0
TMSTP_RECV_EN
R/W
0
This bit enables the differential TMSTP± input.


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