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ADC12DJ2700 Datasheet(PDF) 85 Page - Texas Instruments

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Part No. ADC12DJ2700
Description  5.4-GSPS Single-Channel or 2.7-GSPS Dual-Channel, 12-Bit, RF-Sampling Analog-to-Digital Converter (ADC)
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DJ2700 Datasheet(HTML) 85 Page - Texas Instruments

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85
ADC12DJ2700
www.ti.com
SLVSEH9 – JANUARY 2018
Product Folder Links: ADC12DJ2700
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
7.6.1.1.5
Chip Version Register (address = 0x006) [reset = 0x01]
Figure 92. Chip Version Register (CHIP_VERSION)
7
6
5
4
3
2
1
0
CHIP_VERSION
R-0000 1010
Table 50. CHIP_VERSION Field Descriptions
Bit
Field
Type
Reset
Description
7-0
CHIP_VERSION
R
0000 1010
Chip version, returns 0x0A.
7.6.1.1.6
Vendor Identification Register (address = 0x00C to 0x00D) [reset = 0x0451]
Figure 93. Vendor Identification Register (VENDOR_ID)
15
14
13
12
11
10
9
8
VENDOR_ID[15:8]
R-0x04h
7
6
5
4
3
2
1
0
VENDOR_ID[7:0]
R-0x51h
Table 51. VENDOR_ID Field Descriptions
Bit
Field
Type
Reset
Description
15-0
VENDOR_ID
R
0x0451h
Always returns 0x0451 (TI vendor ID).
7.6.1.2 User SPI Configuration (0x010 to 0x01F)
Table 52. User SPI Configuration Registers
ADDRESS
RESET
ACRONYM
REGISTER NAME
SECTION
0x010
0x00
USR0
User SPI Configuration Register
User SPI Configuration Register (address = 0x010) [reset
= 0x00]
0x011-0x01F
Undefined
RESERVED
RESERVED
7.6.1.2.1
User SPI Configuration Register (address = 0x010) [reset = 0x00]
Figure 94. User SPI Configuration Register (USR0)
7
6
5
4
3
2
1
0
RESERVED
ADDR_HOLD
R-0000 000
R/W-0
Table 53. USR0 Field Descriptions
Bit
Field
Type
Reset
Description
7-1
RESERVED
R/W
0000 000
RESERVED
0
ADDR_HOLD
R/W
0
0: Use the ADDR_ASC bit to define what happens to the
address during streaming (default)
1: Address remains static throughout streaming operation; this
setting is useful for reading/writing calibration vector information
at the CAL_DATA register


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