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ADC12DJ2700 Datasheet(PDF) 77 Page - Texas Instruments

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Part No. ADC12DJ2700
Description  5.4-GSPS Single-Channel or 2.7-GSPS Dual-Channel, 12-Bit, RF-Sampling Analog-to-Digital Converter (ADC)
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DJ2700 Datasheet(HTML) 77 Page - Texas Instruments

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SCLK
1
24
Single Register Access
SCS
SDI
Command Field
Data Field
SDO
(read mode)
Data Field
High Z
High Z
17
16
8
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
R/W
77
ADC12DJ2700
www.ti.com
SLVSEH9 – JANUARY 2018
Product Folder Links: ADC12DJ2700
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Copyright © 2018, Texas Instruments Incorporated
7.5 Programming
7.5.1 Using the Serial Interface
The serial interface is accessed using the following four pins: serial clock (SCLK), serial data in (SDI), serial data
out (SDO), and serial interface chip-select (SCS). Register access is enabled through the SCS pin.
7.5.1.1 SCS
This signal must be asserted low to access a register through the serial interface. Setup and hold times with
respect to the SCLK must be observed.
7.5.1.2 SCLK
Serial data input is accepted at the rising edge of this signal. SCLK has no minimum frequency requirement.
7.5.1.3 SDI
Each register access requires a specific 24-bit pattern at this input. This pattern consists of a read-and-write
(R/W) bit, register address, and register value. The data are shifted in MSB first and multi-byte registers are
always in little-endian format (least significant byte stored at the lowest address). Setup and hold times with
respect to the SCLK must be observed (see the Timing Requirements table).
7.5.1.4 SDO
The SDO signal provides the output data requested by a read command. This output is high impedance during
write bus cycles and during the read bit and register address portion of read bus cycles.
As shown in Figure 86, each register access consists of 24 bits. The first bit is high for a read and low for a write.
The next 15 bits are the address of the register that is to be written to. During write operations, the last eight bits
are the data written to the addressed register. During read operations, the last eight bits on SDI are ignored and,
during this time, the SDO outputs the data from the addressed register. Figure 86 shows the serial protocol
details.
Figure 86. Serial Interface Protocol: Single Read/Write


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