Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ADC12DJ2700 Datasheet(PDF) 59 Page - Texas Instruments

Click here to check the latest version.
Part No. ADC12DJ2700
Description  5.4-GSPS Single-Channel or 2.7-GSPS Dual-Channel, 12-Bit, RF-Sampling Analog-to-Digital Converter (ADC)
Download  146 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DJ2700 Datasheet(HTML) 59 Page - Texas Instruments

Back Button ADC12DJ2700 Datasheet HTML 55Page - Texas Instruments ADC12DJ2700 Datasheet HTML 56Page - Texas Instruments ADC12DJ2700 Datasheet HTML 57Page - Texas Instruments ADC12DJ2700 Datasheet HTML 58Page - Texas Instruments ADC12DJ2700 Datasheet HTML 59Page - Texas Instruments ADC12DJ2700 Datasheet HTML 60Page - Texas Instruments ADC12DJ2700 Datasheet HTML 61Page - Texas Instruments ADC12DJ2700 Datasheet HTML 62Page - Texas Instruments ADC12DJ2700 Datasheet HTML 63Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 59 / 146 page
background image
59
ADC12DJ2700
www.ti.com
SLVSEH9 – JANUARY 2018
Product Folder Links: ADC12DJ2700
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
1. Program JESD_EN = 0
2. Ensure the device is configured to use both channels (PD_ACH = 0, PD_BCH = 0)
3. Select a JMODE that uses the NCO
4. Program all NCO frequencies and phases to be the same for channel A and B (for example, FREQA0 =
FREQB0, FREQA1 = FREQB1, FREQA2 = FREQB2, and FREQA3 = FREQB3)
5. If desired, use the CMODE and CSEL registers or the NCOA[1:0] and NCOB[1:0] pins to choose a unique
frequency for channel A and channel B
6. Program JESD_EN = 1
7. Synchronize the NCOs (using the ILA or using SYSREF); see the NCO synchronization register
8. Write a 1 to the NCO_ALM register bit to clear it
9. Monitor the NCO_ALM status bit or the CALSTAT output pin if CAL_STATUS_SEL is properly configured
10. If the frequency or phase registers are changed while the NCO is enabled, the NCOs can get out of
synchronization
11. Repeat steps 7-9
12. If the device enters and exits global power down, repeat steps 7-9
7.3.8.2 Clock Upset Detection
The CLK_ALM register bit indicates if the internal clocks have been upset. The clocks in channel A are
continuously compared to channel B. If the clocks differ for even one DEVCLK / 2 cycle, the CLK_ALM register
bit is set and remains set until cleared by the host system by writing a 1. For the CLK_ALM register bit to function
properly, follow these steps:
1. Program JESD_EN = 0
2. Ensure the part is configured to use both channels (PD_ACH = 0, PD_BCH = 0)
3. Program JESD_EN = 1
4. Write CLK_ALM = 1 to clear CLK_ALM
5. Monitor the CLK_ALM status bit or the CALSTAT output pin if CAL_STATUS_SEL is properly configured
6. When exiting global power-down (via MODE or the PD pin), the CLK_ALM status bit may be set and must be
cleared by writing a 1 to CLK_ALM
7.3.9 Temperature Monitoring Diode
A built-in thermal monitoring diode is made available on the TDIODE+ and TDIODE– pins. This diode facilitates
temperature monitoring and characterization of the device in higher ambient temperature environments. Although
the on-chip diode is not highly characterized, the diode can be used effectively by performing a baseline
measurement (offset) at a known ambient or board temperature and creating a linear equation with the diode
voltage slope provided in the Electrical Characteristics: DC Specifications table. Perform offset measurement
with the device unpowered or with the PD pin asserted to minimize device self-heating. Only assert the PD pin
long enough to take the offset measurement. Recommended monitoring devices include the LM95233 device
and similar remote-diode temperature monitoring products from Texas Instruments.
7.3.10 Analog Reference Voltage
The reference voltage for the ADC12DJ2700 is derived from an internal band-gap reference. A buffered version
of the reference voltage is available at the BG pin for user convenience. This output has an output-current
capability of ±100 µA. The BG output must be buffered if more current is required. No provision exists for the use
of an external reference voltage, but the full-scale input voltage can be adjusted through the full-scale-range
register settings. In unique cases, the VA11 supply voltage can act as the reference voltage by setting
BG_BYPASS (see the internal reference bypass register).


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn