Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ADC12DJ2700 Datasheet(PDF) 23 Page - Texas Instruments

Click here to check the latest version.
Part No. ADC12DJ2700
Description  5.4-GSPS Single-Channel or 2.7-GSPS Dual-Channel, 12-Bit, RF-Sampling Analog-to-Digital Converter (ADC)
Download  146 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DJ2700 Datasheet(HTML) 23 Page - Texas Instruments

Back Button ADC12DJ2700 Datasheet HTML 19Page - Texas Instruments ADC12DJ2700 Datasheet HTML 20Page - Texas Instruments ADC12DJ2700 Datasheet HTML 21Page - Texas Instruments ADC12DJ2700 Datasheet HTML 22Page - Texas Instruments ADC12DJ2700 Datasheet HTML 23Page - Texas Instruments ADC12DJ2700 Datasheet HTML 24Page - Texas Instruments ADC12DJ2700 Datasheet HTML 25Page - Texas Instruments ADC12DJ2700 Datasheet HTML 26Page - Texas Instruments ADC12DJ2700 Datasheet HTML 27Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 23 / 146 page
background image
23
ADC12DJ2700
www.ti.com
SLVSEH9 – JANUARY 2018
Product Folder Links: ADC12DJ2700
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
Switching Characteristics (continued)
typical values at TA = 25°C, VA19 = 1.9 V, VA11 = 1.1 V, VD11 = 1.1 V, default full-scale voltage (FS_RANGE_A =
FS_RANGE_B = 0xA000), input signal applied to INA± in single-channel modes, fIN = 248 MHz, AIN = –1 dBFS, fCLK =
maximum rated clock frequency, filtered 1-VPP sine-wave clock, JMODE = 1, and background calibration (unless otherwise
noted); minimum and maximum values are at nominal supply voltages and over the operating free-air temperature range
provided in the Recommended Operating Conditions table
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(2)
tADC is an exact, unrounded, deterministic delay. The delay can be negative if the reference sample is sampled after the SYSREF high
capture point, in which case the total latency is smaller than the delay given by tTX.
(3)
The values given for tTX include deterministic and non-deterministic delays. Over process, temperature, and voltage, the delay will vary.
JESD204B accounts for these variations when operating in subclass-1 mode in order to achieve deterministic latency. Proper receiver
RBD values must be chosen such that the elastic buffer release point does not occur within the invalid region of the local multiframe
clock (LMFC) cycle.
ADC CORE LATENCY
tADC
Deterministic delay from the CLK±
edge that samples the reference
sample to the CLK± edge that
samples SYSREF going high(2)
JMODE = 0
–8.5
tCLK cycles
JMODE = 1
–20.5
JMODE = 2
–9
JMODE = 3
–21
JMODE = 4
–4.5
JMODE = 5
–24.5
JMODE = 6
–5
JMODE = 7
–25
JMODE = 9
60
JMODE = 10
140
JMODE = 11
136
JMODE = 12
120
JMODE = 13
232
JMODE = 14
232
JMODE = 15
446
JMODE = 16
430
JMODE = 17
–48.5
JMODE = 18
-49
JESD204B AND SERIALIZER LATENCY
tTX
Delay from the CLK± rising edge that
samples SYSREF high to the first bit
of the multiframe on the JESD204B
serial output lane corresponding to
the reference sample of tADC
(3)
JMODE = 0
72
84
tCLK cycles
JMODE = 1
119
132
JMODE = 2
72
84
JMODE = 3
119
132
JMODE = 4
67
80
JMODE = 5
106
119
JMODE = 6
67
80
JMODE = 7
106
119
JMODE = 9
106
119
JMODE = 10
67
80
JMODE = 11
106
119
JMODE = 12
213
225
JMODE = 13
67
80
JMODE = 14
106
119
JMODE = 15
67
80
JMODE = 16
106
119
JMODE = 17
195
208
JMODE = 18
195
208


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn