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PE426412A-X Datasheet(PDF) 11 Page - Peregrine Semiconductor

Part # PE426412A-X
Description  SP12T RF Switch, 10 MHz?? GHz
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Manufacturer  PSEMI [Peregrine Semiconductor]
Direct Link  http://www.psemi.com
Logo PSEMI - Peregrine Semiconductor

PE426412A-X Datasheet(HTML) 11 Page - Peregrine Semiconductor

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DOC-77561-3 – (03/2017)
Page 11
www.psemi.com
PE426412
SP12T RF Switch
Control Logic
Table 5 provides the control logic truth table for PE426412.
Table 5 • Truth Table for PE426412
LS(1) V4 V3 V2 V1
RFC–
RF1
RFC–
RF2
RFC–
RF3
RFC–
RF4
RFC–
RF5
RFC–
RF6
RFC–
RF7
RFC–
RF8
RFC–
RF9
RFC–
RF10
RFC–
RF11
RFC–
RF12
00
0
0
0
ON
OFF
OFFOFFOFF
OFFOFF
OFFOFF
OFFOFF
OFF
01
0
0
0
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
00
1
0
0
OFF
OFF
ON
OFFOFF
OFFOFF
OFFOFF
OFFOFF
OFF
0
1
1
0
0
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
0
0
0
1
0
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
0
1
0
1
0
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
0
0
1
1
0
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
0
1
1
1
0
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
0
0
0
0
1
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
0
1
0
0
1
OFFOFF
OFFOFFOFF
OFFOFF
OFFOFF
ON
OFF
OFF
0
0
1
0
1
OFFOFF
OFFOFFOFF
OFFOFF
OFFOFF
OFF
ON
OFF
0
1
1
0
1
OFFOFF
OFFOFFOFF
OFFOFF
OFFOFF
OFFOFF
ON
11
1
0
1
ON
OFF
OFFOFFOFF
OFFOFF
OFFOFF
OFFOFF
OFF
10
1
0
1
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
11
0
0
1
OFF
OFF
ON
OFFOFF
OFFOFF
OFFOFF
OFFOFF
OFF
1
0
0
0
1
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
1
1
1
1
0
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
1
0
1
1
0
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
1
1
0
1
0
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
1
0
0
1
0
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
1
1
1
0
0
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
1
0
1
0
0
OFFOFF
OFFOFFOFF
OFFOFF
OFFOFF
ON
OFF
OFF
1
1
0
0
0
OFFOFF
OFFOFFOFF
OFFOFF
OFFOFF
OFF
ON
OFF
1
0
0
0
0
OFFOFF
OFFOFFOFF
OFFOFF
OFFOFF
OFFOFF
ON
X(2)
0
0
1
1
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Notes:
1) LS has an internal 1 M
Ω pull-up resistor to logic high. Connect LS to GND externally to generate a logic 0. Leaving LS floating will generate a
logic 1.
2) LS = don’t care, V4 = 0, V3 = 0, V2 = V1 = 1, all ports are terminated to provide an all isolated state.


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