IDT707278L15PFI datasheet(3/16 Pages) IDT

Part #	IDT707278L15PFI

Description	HIGH-SPEED 32K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH EXTERNAL BANK SELECTS

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Manufacturer	IDT [Integrated Device Technology]

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6.42

IDT707278S/L

32K x 16 Bank-Switchable Dual-Ported SRAM with External Bank Selects

Industrial and Commercial Temperature Ranges

3

INDEX

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

10099 98 97 9695 94 93 92 9190 8988 87 86 8584 8382 81 8079 7877 76

IDT707278

PN100-1

100-PIN

TQFP

TOP VIEW(3)

GND

OER

R/

WR

MBSELR

CE1R

CE0R

BKSEL3

NC

GND

A9R

A10R

A8R

A7R

A6R

A11R

I/O10R

I/O11R

I/O12R

I/O13R

I/O14R

I/O15R

GND

UBR

LBR

3739 drw 02

I/O15L

GND

OEL

R/

WL

MBSELL

CE1L

CE0L

Vcc

BKSEL0

A11L

A10L

NC

A9L

A8L

A7L

A6L

I/O10L

I/O11L

I/O12L

I/O13L

I/O14L

UBL

LBL

GND

NC

.

Pin Names

NOTES:

1. All VCC pins must be connected to power supply.

2. All GND pins must be connected to ground supply.

3. Package body is approximately 14mm x 14mm x 1.4mm.

4. This package code is used to reference the package diagram.

5. This text does not indicate orientation of the actual part-marking.

NOTES:

1. Duplicated per port.

2. Each bank has an input pin assigned that allows the user to toggle the assignment

of that bank between the two ports. Refer to Truth Table IV for more details. When

changing the bank assignments, accesses of the affected banks must be

suspended. Accesses may continue uninterrupted in banks that are not being

reallocated.

3. Generated upon mailbox access.

4. All Vcc pins must be connected to power supply.

5. All GND pins must be connected to ground supply.

6. The first six address pins (A0-A5) for each port serve dual functions. When

MBSEL = VIH, the pins serve as memory address inputs. When MBSEL = VIL,

the pins serve as mailbox address inputs (A6-A12 ignored).

Pin Configurations(1,2,3)

A0 - A12

(1,6)

Address Inputs

BA0 - BA1

(1)

Bank Address Inputs

MBSEL(1)

Mailbox Access Control Gate

BKSEL0-3

(2)

Bank Select Inputs

R/

W(1)

Read/Write Enable

OE(1)

Output Enable

CE0, CE1(1)

Chip Enables

UB, LB(1)

I/O Byte Enables

I/O0 - I/O15

(1)

Bidirectional Data Input/Output

INT(1)

Interrupt Flag (Output)

(3)

VCC

(4)

+5VPower

GND

(5)

Ground

3739 tbl 01

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