10

DAC7617

SBAS185

THEORY OF OPERATION

The DAC7617 is a quad, serial input, 12-bit, voltage output

DAC. The architecture is a classic R-2R ladder configuration

followed by an operational amplifier that serves as a buffer.

Each DAC has its own R-2R ladder network and output op

amp, but all share the reference voltage inputs. The minimum

voltage output (“zero-scale”) and maximum voltage output

word that contains the 12-bit DAC code and a 2-bit address

code that selects one of the four DACs (the two remaining

bits are unused). The converter can be powered from a single

+3V supply. Each device offers a reset function which imme-

diately sets all DAC output voltages and internal registers to

reset code is selected by the state of the RESETSEL pin

operation of the DAC7617.

ANALOG OUTPUTS

The output of the DAC7617 can swing to ground. Note that

the settling time of the output op amp will be longer with

voltages very near ground. Additionally, care must be taken

when measuring the zero-scale error. If the output amplifier

has a negative offset, the output voltage may not change for

since the output voltage cannot swing below ground.

The behavior of the output amplifier can be critical in some

applications. Under short-circuit conditions (DAC output

more current than it can source. See the Specifications Table

for more details concerning short-circuit current.

FIGURE 1. Basic Single-Supply Operation of the DAC7617.

NOTE: (1) U package pin configuration shown. (2) As configured, RESET LOW sets all internal registers

to code 000

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

DD

V

OUTD

V

OUTC

V

REFL

V

REFH

V

OUTB

V

OUTA

AGND

RESETSEL

RESET

LOADREG

LDAC

CS

CLK

SDI

GND

Update Selected Register

Update All DAC Registers

Chip Select

Clock

Serial Data In

0.1

µF

0.1

µF

0V to +1.25V

1

µF to 10µF

+3V

+

0V to +1.25V

0V to +1.25V

0V to +1.25V

+1.25V