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MT9V032 Datasheet(PDF) 60 Page - ON Semiconductor |
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MT9V032 Datasheet(HTML) 60 Page - ON Semiconductor |
60 / 61 page MT9V032 www.onsemi.com 60 APPENDIX B − POWER−ON RESET AND STANDBY TIMING Reset, Clocks, and Standby There are no constraints concerning the order in which the various power supplies are applied; however, the MT9V032 requires reset in order operate properly at power−up. Refer to Figure 49 for the power−up, reset, and standby sequences. Figure 49. Power−up, Reset, Clock and Standby Sequence non−Low−Power Low−Power non−Low−Power Power down Wake up Active Standby Pre−Standby Active Power up MIN 20 SYSCLK cycles Note 3 RESET # STANDBY SYSCLK MIN 10 SYSCLK cycles Does not respond to serial interface when STANDBY = 1 MIN 10 SYSCLK cycles MIN 10 SYSCLK cycles DOUT[9:0] DOUT[9:0] DATA OUTPUT SCLK, SDATA Two−Wire Serial I/F Driven = 0 VDD, VDDLVDS VAA, VAAPIX 1. All output signals are defined during initial power−up with RESET# held LOW without SYSCLK being active. To properly reset the rest of the sensor, during initial power−up, assert RESET# (set to LOW state) for at least 750ns after all power supplies have stabilized and SYSCLK is active (being clocked). Driving RESET# to LOW state does not put the part in a low power state. 2. Before using two−wire serial interface,wait for 10 SYSCLK rising edges after RESET# is de−asserted. 3. Once the sensor detects that STANDBY has been asserted, it completes the current frame readout before entering standby mode. The user must supply enough SYSCLKs to allow a complete frame raedout. See Table 4, “Frame Time,” for more information. 4. In standby, all video data and synchronization output signals are High−Z. 5. In standby, the two−wire serial interface is not active. Standby Assertion Restrictions STANDBY cannot be asserted at any time. If STANDBY is asserted during a specific window within the vertical blanking period, the MT9V032 may enter a permanent standby state. This window (that is, dead zone) occurs prior to the beginning of the new frame readout. The permanent standby state is identified by the absence of the FRAME_VALID signal on frame readouts. Issuing a hardware reset (RESET# set to LOW state) will return the image sensor to default startup conditions. This dead zone can be avoided by: 1. Asserting STANDBY during the valid frame readout time (FRAME_VALID is HIGH) and maintaining STANDBY assertion for a minimum of one frame period. 2. Asserting STANDBY at the end of valid frame readout (falling edge of FRAME_VALID) and maintaining STANDBY assertion for a minimum of [5 + R0x06] row−times. When STANDBY is asserted during the vertical blanking period (FRAME_VALID is LOW), the STANDBY signal must not change state between [Vertical Blanking Register (R0x06) − 5] row−times and [Vertical Blanking Register + 5] row−times after the falling edge of FRAME_VALID. |
Similar Part No. - MT9V032_17 |
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Similar Description - MT9V032_17 |
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