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MT9M114 Datasheet(PDF) 4 Page - ON Semiconductor

Part # MT9M114
Description  High?륞efinition (HD) System?륮n?륾?륝hip (SOC) Digital Image Sensor
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MT9M114 Datasheet(HTML) 4 Page - ON Semiconductor

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MT9M114
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1. This typical configuration shows only one scenario out of multiple possible variations for this sensor.
2. If a MIPI Interface is not required, the following signals must be left floating: DATA_P, DATA_N, CLK_P, and CLK_N. The VDD_PHY power
signal must always be connected to the 1.8 V supply.
3. Only one of the output modes (serial or parallel) can be used at any time.
4. ON Semiconductor recommends a 1.5 k
W resistor value for the two-wire serial interface RPULL-UP; however, greater values may be used
for slower transmission speed.
5. All inputs must be configured with VDD_IO.
6. RESET_BAR and CONFIG both have internal pull-up resistors and can be left floating.
7. ON Semiconductor recommends that 0.1
mF and 1 mF decoupling capacitors for each power supply are mounted as close as possible to
the pad. Actual values and numbers may vary depending on layout and design considerations.
8. TRST_BAR connects to GND for normal operation.
9. OE_BAR should be connected HIGH when using MIPI interface.
Figure 2. Typical Configuration
I/O
Power5
AGND
SCLK
SDATA
VDD_IO
VDD_IO5,7
Notes:
PIXCLK
DGND
EXTCLK
RESET_BAR
SADDR
Analog
Power
LINE_VALID
FRAME_VALID
DOUT[7:0]
CLK_N
CLK_P
Parallel
Port
MIPI
Serial
Port
OR3
RPULL-UP4
Two-wire
Serial Interface
Active LOW Reset
External Clock In
(6−54 MHz)
GND_PLL
VAA
DATA_N
DATA_P
Digital
Core
Power
VDD
PLL
Power
VDD_PLL
PHY
Power2
VDD_PHY
VDD_PHY2,7
VDD_PLL7
VDD7
VAA7
CONFIG6
Active HIGH
Default Settings
TRST_BAR8
OE_BAR9


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